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Architecture of Parallel Computing

Parallel computing involves breaking a problem into discrete parts that can be solved simultaneously using multiple processors. There are different architectures for parallel computing. Von Neumann architecture is the most common design with memory, control unit, arithmetic logic unit, and input/output components. Flynn's taxonomy classifies architectures as single instruction single data (SISD), single instruction multiple data (SIMD), multiple instruction single data (MISD), or multiple instruction multiple data (MIMD) based on their instruction and data streams. Computer architectures can also be general purpose or special purpose depending on the application.

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126 views

Architecture of Parallel Computing

Parallel computing involves breaking a problem into discrete parts that can be solved simultaneously using multiple processors. There are different architectures for parallel computing. Von Neumann architecture is the most common design with memory, control unit, arithmetic logic unit, and input/output components. Flynn's taxonomy classifies architectures as single instruction single data (SISD), single instruction multiple data (SIMD), multiple instruction single data (MISD), or multiple instruction multiple data (MIMD) based on their instruction and data streams. Computer architectures can also be general purpose or special purpose depending on the application.

Uploaded by

Rabia Yazdani
Copyright
© © All Rights Reserved
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Download as DOCX, PDF, TXT or read online on Scribd
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Architecture of Parallel Computing

Parallel Computing:

In the simplest sense, parallel computing is the simultaneous use of multiple compute resources
to solve a computational problem:

o A problem is broken into discrete parts that can be solved concurrently


o Each part is further broken down to a series of instructions
o Instructions from each part execute simultaneously on different processors
o An overall control/coordination mechanism is employed

Architecture of Parallel Computing

Von Neumann Architecture:

Named after the Hungarian mathematician/genius John von Neumann who first authored the
general requirements for an electronic computer in his 1945 papers. Also known as "stored-
program computer" - both program instructions and data are kept in electronic memory. Differs
from earlier computers which were programmed through "hard wiring". Since then, virtually all
computers have followed this basic design:

 Comprised of four main components:


o Memory
o Control Unit
o Arithmetic Logic Unit
o Input/output
 Read/write, random access memory is used to store both program instructions and data
o Program instructions are coded data which tell the computer to do something
o Data is simply information to be used by the program
 Control unit fetches instructions/data from memory, decodes the instructions and
then sequentially coordinates operations to accomplish the programmed task.
 Arithmetic Unit performs basic arithmetic operations.

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 Input/output is the interface to the human operator.

Flynn's Classical Taxonomy

There are different ways to classify parallel computers. One of the more widely used
classifications, in use since 1966, is called Flynn's Taxonomy. Flynn's taxonomy distinguishes
multi-processor computer architectures according to how they can be classified along the two
independent dimensions of Instruction Stream and Data Stream. Each of these dimensions can
have only one of two possible states: Single or Multiple. The matrix below defines the 4 possible
classifications according to Flynn:

Single Instruction, Single Data (SISD):

 A serial (non-parallel) computer


 Single Instruction: Only one instruction stream is being acted on by the CPU during any
one clock cycle
 Single Data: Only one data stream is being used as input during any one clock cycle
 Deterministic execution
 This is the oldest type of computer
 Examples: older generation mainframes, minicomputers, workstations and single
processor/core PCs.

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Single Instruction, Multiple Data (SIMD):

 A type of parallel computer


 Single Instruction: All processing units execute the same instruction at any given clock
cycle
 Multiple Data: Each processing unit can operate on a different data element
 Best suited for specialized problems characterized by a high degree of regularity, such as
graphics/image processing.
 Synchronous (lockstep) and deterministic execution
 Two varieties: Processor Arrays and Vector Pipelines

Multiple Instruction, Single Data (MISD):

 A type of parallel computer


 Multiple Instruction: Each processing unit operates on the data independently via
separate instruction streams.
 Single Data: A single data stream is fed into multiple processing units.
 Few (if any) actual examples of this class of parallel computer have ever existed.

Multiple Instruction, Multiple Data (MIMD):

 A type of parallel computer


 Multiple Instruction: Every processor may be executing a different instruction stream
 Multiple Data: Every processor may be working with a different data stream
 Execution can be synchronous or asynchronous, deterministic or non-deterministic
 Currently, the most common type of parallel computer - most modern supercomputers
fall into this category.

Computer Architecture is further subdivided into two parts:

 General Purpose Architecture


 Special Purpose Architecture.

General Purpose Architecture:


These are the type of computer processors that are used on daily
basis like in simple personal computers.
This type of architecture is further divided into three types
 Synchronous Architecture: In this type of architecture the CU provide the processor with
single instruction to run but on different data.

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 Dataflow Architecture: In data flow architecture nodes and edges are used. Nodes define
the operation or task to be performed and edge defines the data dependency
relationship. Suppose this equation will be processed as a*b+ c*d

 Pipeline Architecture: In pipeline architecture there are two types


Two stage architecture:
This type of architecture includes two steps:
1. Instruction fetch: In this step the instruction is fetched from the CU.
2. Instruction Execute: In this step the fetched Instruction is executed.

Three stage architecture:


This type of architecture includes three steps:
The first two steps remain same as previous but one step is included which is decode

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Decode instruction will work after fetch instruction and decode the instruction and then
execute it.

Special Purpose Architecture: These are the type of processors that are designed for
special purposes like super computers which requires billions of processes to be done in
very less time period.
These are also further divided into two categories
o Asynchronous Architecture:
In this type of architecture all processes perform different operations so it
has further two architectures
 Bus: In this type of architecture, processor share data with memory
through shared bus

In bus architecture chances of dead lock occur so switch architecture


is more efficient.
 Switch: In switch processor switches are used. In this processor
approves the memory causing the prevention of other processor to
access the processor.

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o Systolic Architecture: In this type of architecture processors are in the form of an
array. Every processor in this array performs some kind of operation and pass it
on to the next processor to perform next operation and then data is being stored
in the memory.

It is also known as Multiple Instruction Single Data (MISD)

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