LaboratoryManualForOperationalAmplifiersAndLinearICs 3E

Operational Amplifiers & Linear Integrated Circuits:
Theory and Application
Laboratory Manual/3E
James M. Fiore
2 Laboratory Manual for Operational Amplifiers & LIC
Operational Amplifiers & Linear Integrated Circuits:
Theory and Application
Laboratory Manual
by
James M. Fiore
Version 3.1.2, 26 November 2019
Laboratory Manual for Operational Amplifiers & LIC 3

This Laboratory Manual for Operational Amplifiers & Linear Integrated Circuits: Theory and
Application, Third Edition is copyrighted under the terms of a Creative Commons license:
This work is freely redistributable for non-commercial use, share-alike with attribution
Published by James M. Fiore via dissidents
For more information or feedback, contact:
James Fiore, Professor

Electrical Engineering Technology
Mohawk Valley Community College
1101 Sherman Drive
Utica, NY 13501
jfiore@mvcc.edu
For the latest versions and other titles go to

www.mvcc.edu/jfiore or www.dissidents.com
Cover art, Canadian Shield II, by the author

Introduction
This manual is the companion to the OER (Open Educational Resource) Operational Amplifiers & Linear
Integrated Circuits/3E text. It is intended for use in an operational amplifiers course and is appropriate for
either a two or four year electrical engineering technology curriculum. The manual contains sufficient
exercises for a typical 15 week course using a two to three hour practicum period. The topics cover basic
differential amplifiers through active filters. For equipment, each lab station should include a dual
adjustable DC power supply, a dual trace oscilloscope, a function generator and a quality DMM. Some
exercises also make use of a distortion analyzer and a low distortion generator (generally, THD below
0.01%), although these portions may be bypassed. For components, a selection of standard value ¼ watt
carbon film resistors ranging from a few ohms to a few mega ohms is required along with an array of
typical capacitor values (film types recommended below 1 µF and aluminum electrolytics above). A 100
ohm 5 watt power resistor is needed for the Linear Regulator exercise. A 10k Ω potentiometer will also be
useful for the DC Offset exercise. Active devices include small signal diodes such as the 1N914 or
1N4148, the NZX5V1B and NZX3V3B Zeners (or 1N751/1N5231 and 1N5226 in a pinch), small signal
NPNs such as the 2N3904 or 2N2222, a medium power NPN transistor such as the 2N5192G, and a
variety of inexpensive op amps such as the 741, LF351 or TL081, LF411 and LM318. Most circuits use
standard +/−15 VDC power supplies. All DC supplies should be bypassed with 1 µF capacitors positioned
as close to the IC and ground as possible. The DC supplies are not drawn in detail on the schematics in
order to reduce visual clutter, although the bypass capacitors are included in the parts lists as a reminder.
Each exercise begins with an Objective and a Theory Overview. The Equipment List follows with space
provided for model and serial numbers, and measured values of components. Schematics are presented
next along with the step-by-step procedure. Many exercises include sections on troubleshooting and/or
design. Computer simulations are often presented as well, and almost any quality simulation package
such as Multisim, PSpice, LTspice or TINA-TI can be used. All data tables are grouped together,
typically with columns for the theoretical and experimental results, along with a column for the percent
deviations between them. Finally, a group of appropriate questions are presented.
Other laboratory manuals in this series include DC and AC Electrical Circuits, Semiconductor Devices
(diodes, bipolar transistors and FETs), Computer Programming with Python™ and Multisim™, and
Embedded Controllers Using C and Arduino. Texts are also available for Embedded Controllers as well
as Semiconductor Devices. Workbooks are available for DC and AC Electrical Circuits. All of these titles
are Open Educational Resources using a Creative Commons non-commercial share-alike with attribution
license. The latest versions may be found at my MVCC site: www.mvcc.edu/jfiore and at my mirror site:
www.dissidents.com

A Note from the Author
This manual was created to accompany the text Operational Amplifiers & Linear Integrated Circuits:
Theory and Application. It is used at Mohawk Valley Community College in Utica, NY, for our ABET
accredited AAS program in Electrical Engineering Technology. I am indebted to my students, co-workers
and the MVCC family for their support and encouragement of this project. The text and this manual were
published originally via the traditional route. When the opportunity arose, as a long-time supporter and
contributor to the Open Educational Resource movement, I decided to re-release these titles using a
Creative Commons non-commercial, share-alike license. I encourage others to make use of this manual
for their own work and to build upon it. If you do add to this effort, I would appreciate a notification.
“We need not stride resolutely towards catastrophe, merely because those are the marching orders.”
- Noam Chomsky

Table of Contents
Decibels and Bode Plots . . . . . . 8

The Differential Amplifier . . . . . . 14
The Op Amp Comparator . . . . . . 22
The Non-inverting Voltage Amplifier . . . . 28
The Inverting Voltage Amplifier . . . . . 34
The Op Amp Differential Amplifier . . . . . 38
Parallel-Series and Series-Series Negative Feedback . . 44
Gain-Bandwidth Product . . . . . . 50
Slew Rate and Power Bandwidth . . . . . 56
The Non-compensated Op Amp . . . . . 60
DC Offset . . . . . . . . 64
The Operational Transconductance Amplfier . . . 70
Precision Rectifiers . . . . . . . 74
Function Generation . . . . . . 80
The Linear Regulator . . . . . . 86
The Triangle-Square Generator . . . . . 90
The Wien Bridge Oscillator . . . . . . 94
The Integrator . . . . . . . 98
The Differentiator . . . . . . . 102
VCVS Filters . . . . . . . . 106
The Multiple Feedback Filter . . . . . 114
The State-Variable Filter . . . . . . 120
Appendix A: Creating Graphs Using a Spreadsheet . . 128

Appendix B: Manufacturer’s Datasheet Links . . . 130

Decibels and Bode Plots
Objective
In this exercise, the usage of decibel measurements and Bode plots will be examined. The investigation
will include the relationship between ordinary and decibel gain, and the decibel-amplitude and phase
response of a simple lag network.
Theory Overview
The decibel is a logarithmic-based measurement scheme. It is based on ratios of change. Positive values
indicate an increase while negative values indicate a decrease. Decibel schemes can be used for gains and,
with minor modification, signal levels. A Bode plot shows the variations of gain (typically expressed in
decibels) and phase across a range of frequencies for some particular circuit. These will prove to be very
valuable in later design and analysis work.
Reference
Fiore, Op Amps and Linear Integrated Circuits
Section 1.2, The Decibel
Section 1.3, Bode Plots
Equipment
(1) Oscilloscope model:________________ srn:__________________
(1) Function generator model:________________ srn:__________________
(1) Decibel-reading voltmeter model:________________ srn:__________________
(1) DMM model:________________ srn:__________________
Components
(1) 100n F actual:__________________
(1) 100  actual:__________________
(1) 1k  actual:__________________
(1) 4k7  actual:__________________
(2) 10k  actual:__________________ __________________
(1) 22k  actual:__________________

Schematics
Figure 1
Figure 2

Procedure
1. Calculate the voltage gains (losses) for the voltage divider of Figure 1 for the resistor values
specified, and record them in Table 1. Also, convert each of the ordinary gains into decibel form.
2. Assemble the circuit of Figure 1 using the 22k resistor.
3. Set the generator to a 100 Hz sine wave, 0 dBV (Note: If the meter is calibrated in dBu, then use 0
dBu).
4. Apply the generator to the circuit. Measure and record the output voltage in Table 1 using the decibel-
reading voltmeter. Also, compute the resulting experimental decibel voltage gain and gain deviation.
5. Repeat step 4 for the remaining resistor values in Table 1.
6. To create a simple Bode plot, the lag network of Figure 2 will be used. Assemble this circuit and
record its theoretical critical frequency in Table 2.
7. Set the generator to a 1 kHz sine wave, 0 dBV.
8. Apply the generator to the circuit. Determine the experimental critical frequency by adjusting the
frequency of the generator until the circuit’s output voltage is –3 dBV. Record the measured
frequency in Table 2.
9. Set the generator to a sine wave at one-tenth of the experimental critical frequency.
10. Adjust the generator’s output level to 0 dBV.
11. Apply the generator to the circuit. Measure and record the output level in decibels in Table 3. Also,
measure and record the phase angle between the input and output waveforms and record it in Table 3.
12. Repeat steps 9 through 11 for the remaining frequencies listed in Table 3.
13. Using the values from Table 3, create a Bode plot for this circuit using a log scaled horizontal axis
(i.e., semi-log paper).

Computer Simulation
14. Build the lag network of Figure 2 in a simulator and run an AC Analysis. Be sure to run this from at
least one decade below the critical frequency to at least one decade above. Also, use a decibel scale
for the gain amplitude. Compare the results to the Bode plot generated in Step 13 and include this
graph with the technical report.
Data Tables
R Av Theory Av’ Theory Vout’ Experimental Av’ % Deviation
22k 
10k 
4k7 
1k 
100 
Table 1
Theoretical fc
Experimental fc
Table 2

Factor Frequency A v’ Phase
.1 fc
.2 fc
.5 fc
fc
2 fc
5 fc
10 fc
Table 3
Questions
1. Is the logarithmic nature of the decibel apparent in the data of Table 1?
2. Using the plot created in step 13, determine the slope in dB-per-octave in the region above fc.
3. What would the plot of step 13 look like if ordinary gains had been used instead of decibel gains?

The Differential Amplifier
Objective
In this exercise, the performance of a differential amplifier will be examined. The investigation will
include the DC parameters of input bias and offset current, and output offset voltage. The AC parameters
of interest are the differential and common-mode gains, and the resulting common-mode rejection-ratio
(CMRR).
Theory Overview
The ideal differential amplifier is perfectly symmetrical producing identical DC input bias currents and
output collector voltages. Several factors ranging from the mismatch of transistor parameters to resistor
tolerances prevent perfect symmetry in a practical circuit. The DC quality of the circuit can be expressed
in terms of the mismatches. The difference between the input bias currents is known as the input offset
current. The difference between the output collector voltages is known as the output offset voltage. For
AC performance, the primary items of concern are the differential and common-mode gains. The ideal
differential amplifier will only amplify differential input signals, and thus, has a common-mode gain of
zero. Due to component mismatches and internal design limits, the common-mode gain is never zero,
allowing some portion of the common-mode input signal to make its way to the output. The measure of
the suppression of common-mode signals is given by the common-mode rejection-ratio, or CMRR. CMRR
can be found by dividing the differential gain by the common-mode gain.
Reference
Section 1.6, The Differential Amplifier
Equipment
(1) Dual DC power supply model:________________ srn:__________________
(1) DMM model:________________ srn:__________________

Components
(3) Small signal NPN transistors (2N3904, 2N2222, etc.)
(2) 100  actual:__________________ __________________
(2) 330  actual:__________________ __________________
(2) 470  actual:__________________ __________________
(1) 3k3  actual:__________________
(2) 4k7  actual:__________________ __________________
(1) 5k6  actual:__________________
(1) 10k  actual:__________________
(2) 22k  actual:__________________ __________________
(1) 33k  actual:__________________
2N3904 Datasheet: https://www.onsemi.com/pub/Collateral/2N3903-D.PDF
Schematics
Figure 1

Figure 2
Figure 3

Procedure
DC Parameters
1. Assume that the transistors of Figure 1 have a current gain of 150. Calculate the base currents and
collector voltages for the amplifier of Figure 1 and record them in Table 1. Also, compute and record
the theoretical (ideal) input offset current and output offset voltage.
2. Assemble the circuit of Figure 1.
3. Measure and record the base currents in Table 1. (Note: You may wish to measure the voltage across
the base resistors and compute the base currents if the DMM cannot measure small DC currents.)
Based on these currents, compute and record the experimental input bias and offset currents along
with the corresponding deviations.
4. Measure and record the collector voltages in Table 1. Based on these voltages, compute and record
the experimental output offset voltage and the corresponding deviation.
AC Parameters
5. Calculate the differential voltage gain and collector voltages for the amplifier of Figure 2 using an
input of 20 millivolts, and record them in Table 2.
7. Set the generator to a 1 kHz sine wave, 20 millivolts peak.
8. Apply the generator to the amplifier. Measure and record the AC collector voltages in Table 2 while
noting the phase relative to the input. Also, compute the resulting experimental voltage gain from the
input to collector one, and the deviations.
9. Apply the generator to both inputs. Set the generator’s output to 1 volt peak.
10. Measure the AC voltage at collector one and record it in Table 3.
11. Based on the value measured in step 10, compute and record the common-mode gain and CMRR in
Table 3.
Improved CMRR
12. Assemble the circuit of Figure 3. This circuit uses an improved tail current source that exhibits much
higher internal impedance than the circuit of Figure 2. This should yield a decrease in common mode
gain which, in turn, should yield an improved CMRR. Note that the new circuit sets up virtually the

same tail current, therefore producing approximately the same DC parameters and differential gain as
the original.
13. Repeat steps 9 through 11 recording the results in Table 4.
Troubleshooting
14. Continuing with the amplifier of Figure 3, turn the signal down to 0. Estimate and then measure the
results for each individual error presented in Table 5.
Computer Simulation
15. Build the amplifier of Figure 2 in a simulator and run a Transient Analysis echoing steps 5 through 8.
Compare the results to the data found in Table 2.
Data Tables
DC Quantity Theoretical Experimental % Deviation
IB1
IB2
Iin-bias
Iin-offset
VC1
VC2
Vout-offset
Table 1

AC Quantity Theoretical Experimental % Deviation
VC1
VC2
Av
Table 2
VC1
Acm
CMRR
Table 3
VC1
Acm
CMRR
Table 4

Error Quantity Estimate Actual
3k3 is replaced
VC1 DC
with 33k
Q1’s 4k7 is 470 VC1 DC
Both 4k7 are 470 VC1 DC
Table 5
Questions
1. How might the input offset current of Figure 1 be reduced?
2. What are some causes of output offset voltage in the circuit of Figure 1?
3. What are the effects if the two collector resistors not identical in value?
4. What is the significance of a high CMRR?
5. How significant is the change in CMRR when using the improved current source? Based on the
improvement, estimate the internal impedance of the current source.

The Op Amp Comparator
Objective
In this exercise, the performance of a typical op amp will be examined in the open-loop mode. This
circuit is often referred to as a comparator. The investigation will include the effect of both DC and AC
input signals.
Theory Overview
The open-loop voltage gain of the typical op amp is very high, approaching 100,000 at low frequencies.
With such a high gain, even minute differences between the inverting and non-inverting input signals will
be magnified to the point of causing saturation. Thus, if the non-inverting input signal exceeds the
inverting input signal, the output will be at positive saturation. If the signals are reversed, then negative
saturation results. If both inputs are identical, then the output will go to either positive or negative
saturation, depending on the internal offsets of the op amp.
Reference
Section 2.2, What Is An Op Amp?
Equipment
(1) DMM model:________________ srn:__________________

Components
(1) General purpose op amp (741, 351, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(1) 2k2  actual:__________________
(1) 4k7  actual:__________________
(2) 10k  actual:__________________ __________________
(1) 15k  actual:__________________
(1) 22k  actual:__________________
LM741 Datasheet: http://www.ti.com/lit/ds/symlink/lm741.pdf

LF351 Datasheet: https://www.st.com/resource/en/datasheet/lf351.pdf
LF411 Datasheet: http://www.ti.com/lit/ds/symlink/lf411.pdf
TL081 Datasheet: http://www.ti.com/lit/ds/symlink/tl081.pdf
Schematic
Figure 1

Procedure
1. Calculate the voltages at points A, B, and C, and record them in Table 1.
3. Using the input combinations listed in Table 2, apply the appropriate signals to V1 and V2. Measure
the output signal using the oscilloscope, and record the values in Table 2.
4. Connect V1 to a 10 volt peak-to-peak 1 kHz sine wave. Make sure the oscilloscope inputs are set to
DC Coupling, and then connect probe 1 to V1, probe 2 to V2 and probe 3 to Vout.
5. Connect V2 to point A. Measure the output voltage and save a copy of the oscilloscope display as
Graph 1.
6. Connect V2 to point B. Measure the output voltage and save a copy of the oscilloscope display as
Graph 2.
7. Connect V2 to point C. Measure the output voltage and save a copy of the oscilloscope display as
Graph 3.
Computer Simulation
8. Build the circuit of Figure 1 in a simulator and run a Transient Analysis echoing steps 4 through 7.
Compare the results to the waveforms generated experimentally.
Data Tables
Connection Node Voltage
Table 1

V1 V2 Vout
A A
A B
A C
B A
B B
B C
C A
C B
C C
Table 2
Questions
1. What happens when V1 > V2? Why?
2. What happens when V1 < V2? Why?

3. What happens when V1 = V2? Why?
4. Explain the differences in the waveforms recorded in Graphs 1 through 3.
5. How would the waveform displays be altered if the oscilloscope inputs were set to AC Coupling
instead of DC Coupling in step 4?
6. How would the results of this exercise change if the op amp had a very low gain, say only 1 or 2?

The Non-inverting Voltage Amplifier
Objective
In this exercise, the performance of the non-inverting voltage amplifier will be examined. The
investigation will include the effect of feedback resistors on setting voltage gain, stability of gain with
differing op amps, and input impedance.
Theory Overview
The non-inverting voltage amplifier is based on series-parallel negative feedback. As the ideal voltage-
controlled voltage source, this amplifier exhibits high input impedance, low output impedance, and stable
voltage gain. The voltage gain is set by the two feedback resistors, R i and Rf.
Reference
Section 3.4, The Four Variants of Negative Feedback
Section 4.2, Inverting and Non-inverting Amplifiers
Equipment
(1) DMM model:________________ srn:__________________
For Distortion Measurement Only

(1) Low distortion sine source model:________________ srn:__________________
(1) Distortion analyzer model:________________ srn:__________________
Components
(3) General purpose op amps (1 each of 741, 351, 318, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(1) 1k  actual:__________________
(1) 4k7  actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________

(1) 33k  actual:__________________
(1) 47k  actual:__________________
(1) 100k  actual:__________________

LM318 Datasheet: http://www.ti.com/lit/ds/symlink/lm318-n.pdf
Schematics
Figure 1
Figure 2

Procedure
1. The voltage gain of the non-inverting amplifier can be determined accurately from the feedback
resistors Ri and Rf. Calculate the voltage gains for the amplifier of Figure 1 for the Rf values
specified, and record them in Table 1.
2. Assemble the circuit of Figure 1 using the 4k7  resistor.
4. Apply the generator to the amplifier. Measure and record the output voltage in Table 1. Also,
compute the resulting experimental voltage gain and gain deviation.
5. Repeat step 4 for the remaining Rf values in Table 1.
6. For any given Ri, Rf combination, the voltage gain should be stable regardless of the precise op amp
used, even if it is of an entirely different model. To verify this, first set R f to 22k .
9. Repeat step 8 for two other op amps.
10. It is not practical to use an ohmmeter to determine the input impedance of an active circuit. Instead,
input impedance can be found by utilizing the voltage divider effect. Modify the circuit by adding the
extra input resistor as shown in Figure 2.
11. Set Rf to 4k7 .
12. Set the generator to a 200 Hz sine wave, 1 volt peak.
13. Apply the generator to the amplifier. Use a DMM to measure and record the AC potential from Vin to
point X (i.e.,VA, the voltage across the 100k) in Table 3. Using KVL, determine the voltage from
point X to ground (VB) and record in Table 3 (don’t forget to compensate for peak versus RMS
readings). Finally, compute the resulting input impedance by using the voltage divider rule. Note: If
the DMM is not sensitive enough and registers 0 volts for V A, it is safe to assume that Zin is
considerably larger than the 100k  sensing resistor.

Distortion Measurement
14. Return to the amplifier of Figure 1 with Rf set to 10k . If available, the LF351 is a good choice for
the op amp in this portion. Replace the general purpose generator with the low distortion sine source
set to 1 kHz. Adjust its output level so that the output of the op amp is approximately 0 dBV.
15. Apply the distortion analyzer to the output of the op amp, read the resulting THD percentage and
record it in Table 4.
16. Repeat steps 14 and 15 using the remaining Rf values in Table 4.
Troubleshooting
17. Continuing with the amplifier of Figure 1, reset Rf to 4k7 . Estimate and then measure the results
for each individual error presented in Table 5.
Data Tables
Rf Theoretical Av Vout Experimental Av % Deviation
4k7 
10k 
22k 
33k 
47k 
Table 1

Op Amp Theoretical Av Vout Experimental Av % Deviation
Table 2
VA VB Zin
Table 3
Rf % THD
10k 
22k 
47k 
Table 4

Ri’s third band is

Vout
orange
fin is 100 Hz Vout
Ri is swapped
Vout
with Rf
+ and – signal
input pins Vout
swapped
Table 5
Questions
1. What is the effect as Rf is increased?
2. How does the voltage gain vary as the op amp is changed?
3. Does the non-inverting voltage amplifier exhibit a predictable and stable voltage gain?
4. What can be said about the input impedance of this type of amplifier?
5. What is the relationship between gain, feedback and distortion?

The Inverting Voltage Amplifier
Objective
In this exercise, the performance of the inverting voltage amplifier will be examined. The investigation
will include the effect of feedback resistors on setting voltage gain, stability of gain with differing op
amps, and the concept of virtual ground.
Theory Overview
The inverting voltage amplifier is based on parallel-parallel negative feedback. This amplifier exhibits
modest input impedance, low output impedance, and stable inverting voltage gain. The voltage gain is set
by the two feedback resistors, Ri and Rf.
Reference
Equipment
(1) DMM model:________________ srn:__________________
Components
(3) General purpose op amps (1 each of 741, 351, 318, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(1) 1k  actual:__________________
(1) 4k7  actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________
(1) 33k  actual:__________________
(1) 47k  actual:__________________

Schematic
Figure 1
Procedure
1. The voltage gain of the inverting amplifier can be determined accurately from the feedback resistors
Ri and Rf. Calculate the voltage gains for the amplifier of Figure 1 for the Rf values specified, and
record them in Table 1.
4. Apply the generator to the amplifier. Measure and record the output voltage in Table 1, noting its
phase relative to the input. Also, compute the resulting experimental voltage gain and gain deviation.
6. For any given Ri, Rf combination, the voltage gain should be stable regardless of the precise op amp
used, even if it is of an entirely different model. To verify this, first set R f to 22k .
9. Repeat step 8 for two other op amps.

10. The concept of virtual ground is very important. A virtual ground exists at the inverting input of the
op amp in this circuit. Ideally, the voltage at this point should be very close to 0. Through voltage
divider effect, this implies that all of the input signal must be dropping across R i, and thus Ri must
establish the input impedance of the amplifier.
11. Set Rf to 4k7 .
13. Apply the generator to the amplifier. Use a DMM to measure and record the AC potential at the
inverting terminal of the op amp. Record the value in Table 3.
Computer Simulation
14. Build the circuit in a simulator and run a Transient Analysis echoing steps 2 through 5. Compare the
results to the waveforms generated experimentally.
15. Repeat step 14 but this time use the Distortion Analyzer instrument to compare voltage gain to THD.
Data Tables
Rf Av Theory Vout Phase Experimental Av % Deviation
4k7 
10k 
22k 
33k 
47k 
Table 1

Op Amp Av Theory Vout Experimental Av % Deviation
Table 2
Vinverting-input
Table 3
Questions
1. What is the effect as Rf is increased?
2. How does the voltage gain vary as the op amp is changed?
3. Does the inverting voltage amplifier exhibit a predictable and stable voltage gain?
4. What can be said about the input impedance of this type of amplifier?
5. Based on the simulation, what is the relationship between gain, feedback and distortion for this circuit?

The Op Amp Differential Amplifier
Objective
In this exercise, the performance of an op amp based differential amplifier will be examined. The
investigation will include the effects of differential gain and common-mode rejection ratio (CMRR).
Theory Overview
An op amp differential amplifier can be created by combining both a non-inverting voltage amplifier and
an inverting voltage amplifier in a single stage. Proper gain matching between the two paths is essential to
maximize the common-mode rejection ratio. Differential gain is equal to the gain of the inverting path.
Reference
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) General purpose op amps (741, 351, etc.)
(2) 1 µF actual:__________________ __________________
(2) 10 k actual:__________________ __________________
(1) 15 k actual:__________________
(1) 22 k actual:__________________
(2) 100 k actual:__________________ __________________
(1) 10 k potentiometer

Schematics
Figure 1
Figure 2

Procedure
1. This circuit can be examined through the use of the Superposition Theorem. The contribution of each
input can be measured individually, combined, and then compared with common-mode and
differential inputs.
2. Calculate the differential voltage gain for the amplifier and record it in Table 1
3. Assemble the circuit of Figure 6.1. Try to get the Ri/Rf ratio as close as possible to the Ri’/Rf’ ratio,
even if you have to mix and match several resistors.
5. Apply the generator to the Vinv input, and ground the Vnon input.
6. Measure and record the output voltage in Table 2, noting the phase relative to the input. Also,
compute the resulting voltage gain.
7. Swap the inputs by connecting the Vnon input to the generator, and grounding the Vinv input.
8. Measure and record the output voltage in Table 2, noting the phase relative to the input. Also,
compute the resulting voltage gain.
9. Compare the results of step 6 to step 8. The gains should be identical except that one is inverting
while the other is non-inverting. Calculate the results of adding the two output signals and place the
values in Table 3.
10. To measure the common-mode gain, connect both inputs to the generator (removing the V inv ground).
Record the output voltage and resulting gain in Table 3.
11. Assemble the circuit of Figure 2. Adjust the potentiometer to set the voltage gain to precisely –1. This
circuit is a simple phase-splitter and is used to generate a differential input signal.
12. Connect the circuit of Figure 2 to the original circuit as shown.
13. Measure and record the output voltage in Table 3.
14. Based on the results of Table 3, compute the experimental common-mode rejection ratio and place it
in Table 4.

Data Tables
Theoretical Differential Gain
Table 1
Input Vout Phase Av
Vinv
Vnon
Table 2
Circuit Vout Av
Superposition
Common-mode
Differential
Table 3
Experimental CMRR
Table 4

Questions
1. What controls the differential gain?
2. Why is it important to match the resistor ratios in step 3?
3. Why is it important to set the gain of the phase-splitter to precisely one in step 11?
4. What determines the theoretical maximum CMRR for the op amp differential amplifier?

Parallel-Series and Series-Series
Negative Feedback
Objective
In this exercise, the performance of the current-source amplifiers will be examined. The investigation will
include the effect of feedback resistors on setting gain for both the parallel-series inverting current
amplifier and the series-series non-inverting voltage-to-current transducer.
Theory Overview
Series-output feedback connections create controlled current sources. This means that the load current
will be constant in spite of changes in load impedance. Two variants are possible. Parallel-input
connections create a current-sensing circuit, thus P-S feedback forms a current-controlled current-source,
or ideal current amplifier. The current gain is set by the two feedback resistors, R i and Rf. Series-input
connections create a voltage-sensing circuit, thus S-S feedback forms a voltage-controlled current-source,
or voltage-to-current transducer. The transconductance is set by the feedback resistor R i.
Reference
Section 3.4, The Four Variants of Negative Feedback
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) 1µ F actual:__________________ __________________
(1) 100  actual:__________________
(2) 1k  actual:__________________ __________________
(1) 2k2  actual:__________________

(1) 3k3  actual:__________________
(1) 4k7  actual:__________________
(2) 10k  actual:__________________ __________________
(2) 22k  actual:__________________ __________________
Schematics
Figure 1
Figure 2

Procedure
Series-Series Voltage-to-Current Transducer
1. The transconductance of the voltage-to-current transducer can be determined from R i. Based on the Ri
values, calculate the expected Iload for the circuit of Figure 1, and record them in Table 1.
2. Assemble the circuit of Figure 1 using Ri = 1k  and Rload = 100 .
4. Apply the generator to the amplifier. Measure and record the load current in Table 1. Also, compute
the resulting theoretical versus experimental deviation.
5. Repeat step 4 for the remaining Ri values in Table 1.
6. Since the circuit behaves as a constant current source, the value of the load resistance should have no
effect on the load current (within normal parameters). To verify this, change R load to 1k  and repeat
steps 4 and 5, using Table 2.
Parallel-Series Current Amplifier

7. The gain of the current amplifier can be determined from R i and Rf. Based on these values, calculate
the expected Ai and Iload for the circuit of Figure 2, and record them in Table 3.
8. Assemble the circuit of Figure 2 using 22k  for Rf.
9. Set the generator to a 100 Hz sine wave, 1 volt peak. Note that the 10k  resistor at the input serves
to convert the voltage from the generator into a current. With the values specified, the input current
should be approximately 100 microamps.
10. Apply the generator to the amplifier. Measure and record the load current in Table 3. Also, compute
the resulting current deviation.
Troubleshooting
12. Utilizing the circuit of Figure 2, suppose that all of the results found in Table 3 are approximately 10
times smaller than they should be. Consider and test at least two plausible causes for this scenario,
and include the results in the technical report.

Data Tables
Ri Iload 100  Theory Iload 100  Experiment % Deviation
1k 
2k2 
3k3 
4k7 
10k 
Table 1
Ri Iload 1k  Theory Iload 1k  Experiment % Deviation
1k 
2k2 
3k3 
4k7 
10k 
Table 2

Rf Ai Theory Iload Theory Iload Experiment % Deviation
22k 
10k 
4k7 
2k2 
Table 3
Questions
1. What is the effect as Ri is increased in the circuit of Figure 1?
2. Does the load impedance play an appreciable role in setting the load current?
3. What is the effect as Rf is decreased in the circuit of Figure 2?
4. In practical voltage-source circuits, the load impedance can be too small, forcing the op amp into
current limiting with resulting distortion. Are there similar limits in the current-source circuits?

Gain-Bandwidth Product
Objective
In this exercise, the upper frequency limit of a typical amplifier will be examined. The investigation will
include the effect of voltage gain on f2. Two different measurement techniques will be employed: direct
measurement of the 3 dB frequency, and indirect measurement via rise time.
Theory Overview
The upper break frequency, f2, of a typical amplifier is a function of the circuit gain and the op amp’s
unity-gain frequency, funity. Typical op amps exhibit a 20 dB per decade roll off slope in their open-loop
response. When negative feedback is applied, this results in a direct tradeoff between closed-loop gain
and f2. Any increase in gain results in an equivalent decrease in f2, and vice versa. In other words, the
product of closed-loop gain and f2 must be a constant. This constant can be found on a device data sheet
as either funity or GBW (short for Gain-BandWidth product).
Reference
Section 5.3, Gain-Bandwidth Product
Equipment
(1) DMM model:________________ srn:__________________
Components
(1) Medium speed op amp (351, 411, 081, etc., do not use 741 or similar)
(2) 1µ F actual:__________________ __________________
(1) 220  actual:__________________
(1) 4k7  actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________
(1) 33k  actual:__________________
(1) 47k  actual:__________________

Schematic
Figure 1
Procedure
1. The upper break frequency, f2, of the amplifier in Figure 1 can be determined from its voltage gain
and the funity of the op amp. Calculate the f2 values for the amplifier of Figure 1 for the Rf values
specified, and record them in Table 1.
3. Set the generator to a 100 Hz sine wave.
4. Apply the generator to the amplifier and adjust its level to achieve a 5 volt peak signal out of the op
amp. Measure the input voltage and compute the resulting voltage gain. Record this voltage gain in
Table 1.
5. Increase the frequency until the op amp’s output voltage drops 3 dB (i.e., to 0.707 times 5 volts peak).
Record this frequency in Table 1 as the experimental f2.
6. Compute the experimental funity by multiplying the experimental voltage gain by the experimental f2,
and enter this value in Table 1.
7. Repeat steps 3 through 6 for the remaining Rf values in Table 1. Note that the values in the
experimental funity column should be consistent with the funity specified in the device data sheet.

8. An alternate method to determine f2 is to measure the rise time of an output square wave. To follow
this method, first set the generator to a 1 kHz square wave.
9. Apply the generator to the amplifier and adjust its level to achieve a 2 volt peak signal out of the op
amp. Measure the rise time and record this value in Table 2. An accurate measurement is important,
so be sure to expand the time base so that the rising edge fills the majority of the oscilloscope display.
10. Use the rise time to compute the experimental f2, and record this value in Table 2.
11. Compute the experimental funity by multiplying the experimental voltage gain from Table 1 by the
experimental f2 found in step 10, and enter this value in Table 2.
12. Repeat steps 9 through 11 for the remaining Rf values in Table 2. Note that the values in the
experimental funity column should be consistent with those found in Table 1.
Computer Simulation
13. Build the circuit in a simulator and run an AC Analysis for each resistor listed in Table 1. Be sure to
run the plot from 100 Hz to approximately funity and use a decibel scale for the gain amplitude. Record
the simulation f2 results in Table 3 and compare them to the f2 values measured in Tables 1 and 2.
Include the graph for the 4k7 with the technical report.
Data Tables
Rf f2 Theory Av Experiment f2 Experiment funity Experiment
4k7 
10k 
22k 
33k 
47k 
Table 1

Rf Trise Experiment f2 Experiment funity Experiment
4k7 
10k 
22k 
33k 
47k 
Table 2
Rf f2 Simulation
4k7 
10k 
22k 
33k 
47k 
Table 3

Questions
1. What is the effect on f2 as Av is increased?
2. What is the effect on rise time as Av is increased?
3. Is funity a constant across a wide range of voltage gains?
4. How would the results of this exercise differ if an op amp with a considerably higher funity was used?

Slew Rate and Power Bandwidth
Objective
In this exercise, the effects of slew rate on pulse and sinusoidal waveforms will be examined.
Theory Overview
Slew rate places an upper “speed limit” on the rate of change of output voltage. This tends to slow the
rising and falling edges of pulse signals, turning them into a trapezoidal shape. In the case of sinusoidal
signals, slew rate limiting tends to turn waves into a more triangular shape. The maximum non-slewed
sine wave frequency for a given output amplitude is termed the power bandwidth, or f max. Any output
signal that exceeds the power bandwidth at the stated output amplitude will exhibit slew rate induced
distortion. Slew rate is determined by the internal characteristics of a given op amp. In most op amps,
circuit gain or feedback resistor values do not affect the slew rate.
Reference
Section 5.4, Slew Rate and Power Bandwidth
Equipment
(1) DMM model:________________ srn:__________________
Components
(3) General purpose op amps (1 each of 741, 351, 081, 411, etc., do not use 318 or similar)
(2) 1µ F actual:__________________ __________________
(1) 2k2  actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________
(1) 33k  actual:__________________
(1) 47k  actual:__________________

Schematic
Figure 1
Procedure
1. Calculate the voltage gains for the amplifier of Figure 1 for the Rf values specified, and record them
in Table 1.
2. Look up the typical slew rates for the three op amps and place them in Table 2.
3. Assemble the circuit of Figure 1 using the 22k  resistor and the slowest op amp.
4. Set the generator to a 1 kHz square wave.
5. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a clipped signal
at the output of the op amp. Make sure that the edges of the waveform are sharp, and not rounded.
Expand the time scale so that the rising edge fills the oscilloscope display. Measure and record the
slew rate in Table 1.
7. Set Rf to 10k . Set the generator to a 1 kHz square wave.
8. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a clipped signal
at the output of the op amp. Save a copy of the oscilloscope display showing approximately one cycle
of the waveform. Measure and record the slew rate in Table 2.

9. Repeat step 8 for the other op amps in Table 2.
10. Using a peak sine wave output of 10 volts, compute the theoretical power bandwidth for each of the
op amps in Table 3.
11. Set the generator to a 1 kHz sine wave.
12. Apply the generator to the amplifier and adjust the generator’s amplitude to achieve a 10 volt peak
signal at the output of the op amp.
13. While monitoring the amplifier’s output signal with the oscilloscope, increase the frequency until
slew rate limiting occurs (the waveform will start to appear triangular). The point at which slew rate
limiting just begins is not easy to discern by eye. If the waveform is triangular, then the op amp is
well into slew rate limiting. Gradually decrease the frequency until the waveform distortion just
seems to disappear. Record the frequency as the experimental f max in Table 3.
14. Repeat steps 11 through 13 for the remaining op amps in Table 3.
Computer Simulation
15. Build the circuit in a simulator and run a Transient Analysis for each op amp used in Table 2, echoing
steps 7 through 9. Be sure to set the time scale so that at least one but no more than two cycles are
plotted. Compare these to the corresponding oscilloscope images and include the graphs with the
technical report.
Data Tables
Rf Av Theory Slew Rate Experiment
22k 
33k 
47k 
Table 1

Op Amp Slew Rate Theory Slew Rate Experiment
Table 2
Op Amp fmax Theory fmax Experiment % Deviation
Table 3
Questions
1. Does voltage gain affect slew rate?
2. How does the slew rate affect power bandwidth?
3. How does the output amplitude affect power bandwidth?
4. Is it possible for triangle waves to suffer from slew rate limiting?

The Non-compensated Op Amp
Objective
In this exercise, the performance of a typical non-compensated op amp, the 301, will be examined. The
investigation will include the effect of the external compensation capacitor on voltage gain, closed-loop
bandwidth and slew rate.
Theory Overview
Op amps usually contain an internal compensation capacitor, C c. This capacitor enforces a 20 dB per
decade gain slope up to the unity-gain frequency, and allows stable voltage gains down to unity.
Unfortunately, this will not normally produce optimal values for small signal bandwidth and slew rate for
gains considerably greater than unity. In the case where unity-gain stability is not required, a smaller
value for Cc may be used, resulting in improved bandwidth and slew rate. Non-compensated op amps
include connections for an external compensation capacitor that can be adjusted for optimal performance.
Reference
Section 5.4, Slew Rate and Power Bandwidth
Equipment
(1) DMM capable of measuring in dB model:________________ srn:__________________
Components
(1) LM301 op amp
(2) 1 µF actual:__________________ __________________
(1) 150 pF actual:__________________
(1) 33 pF actual:__________________
(1) 10 pF actual:__________________
(1) 22 k actual:__________________
(1) 47 k actual:__________________
(1) 100 k actual:__________________
LM301 Data sheet: http://www.ti.com/lit/ds/symlink/lm101a-n.pdf

Schematic
Figure 1
Procedure
1. Notice that Figure 10.1 is a series-parallel non-inverting voltage amplifier. Calculate the theoretical
voltage gain for the amplifier and record it in Table 1.
2. Assemble the circuit using Cc = 150 pF.
3. Set the generator to a 100 Hz sine wave.
4. Set the output voltage of the op amp to 1 volt peak. Measure and record the input voltage in Table 2.
Also, compute the resulting voltage gain.
5. Using the decibel-reading voltmeter, increase the input frequency until the op amp’s output voltage
drops 3 dB from it’s value at 100 Hz. If a dB meter is not available, use the oscilloscope to find the
frequency at which the op amp’s output voltage drops to 0.707 times the 100 Hz value. (Note that –3
dB corresponds to a factor of 0.707.) Record the frequency in Table 2.
6. Change the generator to a 10 kHz square wave.
7. Increase the generator’s amplitude so that the output of the op amp is obviously slewed, about 10
volts peak (straight lines for the leading and trailing edges).
8. Measure the slew rate and record it in Table 2.
9. Repeat steps 3 through 8 using Cc = 33 pF and Cc = 10 pF.

Data Tables
Theoretical voltage gain
Table 1
Cc Vin Av f2 SR
150 pF
33 pF
10 pF
Table 2
Questions
1. How does f2 vary with Cc?
2. How does Av vary with Cc?
3. How does slew rate vary with Cc?

4. What is the effect on small signal bandwidth and power bandwidth as C c is decreased?
5. How does this op amp compare with a typical compensated op amp such as the 741?

DC Offset
Objective
In this exercise, the effect of DC offsets will be examined. The investigation will include the effect of
voltage gain and op amp on the magnitude of offset, as well as standard techniques to null or remove
offsets.
Theory Overview
A DC offset is an undesirable effect. Due to internal mismatches in the op amp, a DC signal may be
present at the output of an amplifier. This generally does not present a problem for an AC amplifier, but it
does lead to ambiguity in the output of a DC amplifier. A DC offset may be either positive or negative.
The magnitude of the offset is proportional to the gain of the amplifier and the size of the feedback
resistors. It also depends on the “luck of the draw,” in other words, just how well matched the internals of
a given op amp happen to be.
Reference
Section 5.5, Offsets
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) General purpose op amps (741, 351, 081, etc., do not use 411 or similar precision device)
(2) 1µ F actual:__________________ __________________
(2) 1k  actual:__________________ __________________
(1) 4k7  actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________
(1) 33k  actual:__________________
(1) 47k  actual:__________________
(1) 10k  potentiometer

Schematics
Figure 1
Figure 2
Procedure
1. Note that the circuit of Figure 1 is a non-inverting voltage amplifier. Calculate the voltage gains for
the amplifier of Figure 1 for the Rf values specified, and record them in Table 1.
2. The worst case output offset may be approximated by multiplying the worst case V os found in the op
amp’s data sheet by the voltage gain. This ignores the effect of the feedback resistor values.
Calculate the offsets for the gains found in step 1, and record the values in Table 1.
3. Assemble the circuit of Figure 11.1 using the 4k7  resistor.
4. Measure and record the DC output offset voltage in Table 1.

6. Compute the resulting experimental Vos values by dividing the output offsets by the corresponding
voltage gains. The experimental Vos values should be no larger than the value specified in the data
sheet, although they may be considerably smaller. Finally, compute the offset deviations. Note that
the Vos and deviation values should be fairly constant through the table.
7. Since the actual Vos of any given op amp can range between +/– Vos worst case, a different device
may produce considerably different values from those in Table 1. To verify this, repeat steps 3
through 6 for a second op amp, and record your results in Table 2.
8. Manufacturers normally allow for output nulling through the addition of external circuitry. Modify
the circuit by adding the components shown in Figure 2. Using the 47k  resistor for Rf, adjust the
potentiometer to null the output. Also, record the DC output voltage with the potentiometer fully
clockwise and fully counterclockwise.
Computer Simulation
9. Build the circuit of Figure 1 in a simulator using a 741 op amp and 47k for R f. Run a DC Operating
Point analysis to determine the DC output voltage. Compare this to the results measured in Tables 1
and 2. Repeat the simulation with all resistors 10 times larger, and again with all resistors 100 times
larger.
Data Tables
Rf Av Theory Vout Theory Vout Experiment Vos Experiment % Deviation
4k7 
10k 
22k 
33k 
47k 
Table 1

Rf Av Theory Vout Theory Vout Experiment Vos Experiment % Deviation
4k7 
10k 
22k 
33k 
47k 
Table 2
Potentiometer Vout
CW
CCW
Table 3
Questions
1. What is the effect on output offset voltage as the voltage gain is increased?

2. Is the worst case Vos a good approximation for the actual Vos? Explain.
3. Given the range of adjustment found in Table 3 along with the data from Tables 1 and 2, is it likely
that the circuitry of Figure 2 will be sufficient to correct for the offset produced by a worst case op
amp? Explain.
4. Based on the simulation results, is it safe to say that output DC offset is only affected by voltage gain
and not the specific feedback resistor values used?

The Operational Transconductance
Amplifier
Objectives
In this exercise, an application of the operational transconductance amplifier ( OTA) will be examined.
The application is that of a voltage-controlled amplifier ( VCA). The VCA has use in a variety of areas
including automatic gain control, audio level compressors and amplitude modulators.
Theory Overview
The gain of the OTA is a function of a programming current, Iabc. Since Iabc may be derived from other
electronic signals, complex dynamic gains are possible. Further, because the OTA tends to behave as an
ideal current source (i.e., it exhibits a high output impedance), a constant voltage output is best rendered
through the use of a following current-to-voltage transducer. Finally, the OTA can only tolerate fairly
small input signals, so some form of input attenuation is normally used.
Reference
Section 6.7, Operational Transconductance Amplifier
Equipment
(2) Function generators model:________________ srn:__________________
model:________________ srn:__________________
(1) Triple DC power supply model:________________ srn:__________________
(1) DMM model:________________ srn:__________________
Components
(1) 3080 OTA (or 13600 or 13700 with alternate pin-out)
(1) FET input op amp (351, 411, 081, etc.)
(2) 1 µF actual:__________________ __________________
(2) 470  actual:__________________ __________________
(2) 22 k actual:__________________ __________________
(1) 33 k actual:__________________
(2) 47 k actual:__________________ __________________

(1) 100 k actual:__________________
LM3080 Data sheet: http://www.ti.com/lit/ds/symlink/lm3080.pdf
LM13700 Data sheet: http://www.ti.com/lit/ds/symlink/lm13700.pdf
Schematic
Figure 1
Procedure
1. Assemble the circuit of Figure 1. Note that the power supplies are only +/– 5 VDC, not the usual +/–
15 VDC.
2. For proper operation, it is very important that any DC input signals be nulled. Failure to do so will
cause the control signal to “leak” into the output. To null the circuit, first tie the left end of the 33 k
resistor to ground. Also, tie Vcontrol to ground. Finally, adjust the potentiometer until Vout is 0 VDC.
The circuit is now nulled. Unhook the resistor and control points from ground in order to continue to
the next step.
3. Set Vcontrol to –3 VDC. If a third output is not available on the DC power supply, the –3 VDC potential
may be derived from the –5 VDC supply and appropriate divider resistors.
4. Set the main generator to a 100 kHz sine wave, 1 volt peak.
5. Apply the generator to the circuit input. Measure and record the output voltage in Table 1. Also,
compute the resulting experimental voltage gain.

6. Repeat steps 3 through 5 for the remaining Vcontrol values in Table 1.
7. Using the data from Table 1, plot the gain versus control voltage characteristic as
Graph 1.
8. Set the second generator to a 1 kHz sine wave, 1 volt peak. Apply the second generator to the V control
point.
9. Set the main generator to a 1 volt peak 100 kHz sine wave, and connect it to the circuit input.
10. Measure and record the output waveform as Graph 2.
11. Change the main generator to a 1 volt peak 100 kHz triangle wave and record the resulting output
waveform as Graph 3.
Data Tables
Vcontrol Vout Av
–3 VDC
–2 VDC
–1 VDC
0 VDC
+1 VDC
+2 VDC
+3 VDC
Table 1

Questions
1. What is the effect as Vcontrol is increased?
2. Is the control/gain relationship linear?
3. What is the purpose of the second op amp in Figure 1?
4. Explain how the control signal “leaks” into the output signal if the circuit is not nulled properly.
5. Based on Graphs 2 and 3, does this circuit appear to be a good candidate for an amplitude modulator?

Precision Rectifiers
Objective
In this exercise, precision half-wave and full-wave rectifiers will be examined. The investigation will
include the accuracy of rectification and peak detection.
Theory Overview
Simple passive diode circuits cannot rectify small signals accurately. The forward bias potential of the
diode acts as a constant barrier. By placing the diode inside the feedback loop of an op amp, the forward
bias potential can be compensated for to a great extent. Both half-wave and full-wave circuits can be
created in this fashion. Further, the addition of load capacitance can be used to create a simple envelope
detector. On the downside, the frequency response of precision rectifiers is limited by the op amp(s) used.
Reference
Section 7.2, Precision Rectifiers
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) General purpose op amps (741, 351, 411, 081, etc.)
(2) Small-signal diodes (1N914, 1N4148, etc.)
(3) 1µ F actual:__________________ __________________ __________________
(1) 10n F actual:__________________
(1) 22k  actual:__________________
(6) Equal value resistors in the range of 10k  to 100k 
actual:__________________ __________________ __________________
actual:__________________ __________________ __________________
1N4148/1N914 Datasheet: https://www.onsemi.com/pub/Collateral/1N914-D.PDF

Schematics
Figure 1
Figure 2

Procedure
Precision Half-wave Rectifier and Detector

1. The circuit of Figure 1 is a precision half-wave rectifier. Without C, the circuit responds as an “ideal
diode” allowing only positive half-waves through. The addition of C turns the circuit into peak
detector or analog pulse-stretcher. Since all of the circuits in this exercise can produce DC
components in the output signals, it is very important to take measurements with the oscilloscope
input set to DC coupled.
2. Assemble the circuit of Figure 1 without the load capacitor.
3. Set the generator to a 1 kHz sine wave, and set its output voltage to 1 volt peak.
4. Measure Vout and save a copy of the oscilloscope display as Graph 1. Also measure and save the
waveform at the output pin of the op amp as Graph 2.
5. Reverse the diode, measure Vout and save a copy of the oscilloscope display as Graph 3.
6. While monitoring the load voltage, increase the frequency of the generator and note how the
distortion in the waveform increases. If a considerably faster or slower op amp is available (in terms
of funity and slew rate), repeat this process and compare the frequencies at which the two op amps start
to distort.
7. Return the diode to its original orientation and add C = 10n F.
8. Apply a 1 volt peak 1 kHz pulse waveform with 10% duty cycle to the input of the circuit.
9. Measure Vout and save a copy of the oscilloscope display as Graph 4.
10. Replace the 10n F load capacitor with a 1µ F capacitor. Measure and save the Vout waveform as
Graph 5.
Precision Full-wave Rectifier

11. Decide on a value for R in Figure 2 and assemble it. The actual value of R is not critical. The
important thing is that the resistors should be close in value, preferably within a few percent of each
other.
12. Set the generator to a 1 kHz sine wave, and set its output voltage to 1 volt peak.
13. Record the waveforms at the cathode of D 2 and at Vout as Graph 6.

14. Reverse the polarity of the diodes and record the waveforms at D 2 and at Vout as Graph 7.
15. Try several different input wave shapes (square, triangle, ramp, etc.) while monitoring Vout and note
the resulting shapes.
16. Set the generator to a 1 volt peak 100 Hz sine wave and place the oscilloscope in XY mode.
17. For Graph 8, plot the transfer characteristic of the circuit by placing the X (horizontal) probe at the
generator, and the Y (vertical) probe at the load (Vout).
Troubleshooting
18. Continuing with the circuit of Figure 2, estimate and then measure the results for each individual
error presented in Table 1.
Computer Simulation
19. Build the circuit of Figure 1 in a simulator using a 351 op amp and without the load capacitor. Run a
Transient Analysis to determine the voltages at the output pin of the op amp and at V out. Compare the
waveforms to those recorded as Graphs 1 and 2.
Data Table
R/2 is simply R Vout
D2 is shorted Vout
Ri of op amp 1 is
Vout
open
Table 1

Questions
1. What is the effect of flipping the diode in Figure 1?
2. How does the output waveform of the op amp itself compare with the load waveform?
3. What is the effect of increasing load capacitance in Figure 1?
4. In general, what can be said about the use of op amps with high slew rates and funity values in
precision rectifiers?
5. What is the effect of flipping the diodes in Figure 2?
6. Briefly describe what each half of Figure 2 is doing.
7. What would be the effect of doubling Rf of the second op amp of Figure 2?

Function Generation
Objective
In this exercise, the concept of function generation will be examined. The investigation will include the
use of both biased diode networks and Zener diodes. Increasing as well as decreasing gain curves will be
used.
Theory Overview
The gain of an amplifier can be nonlinear if the feedback resistors themselves are nonlinear. By shunting
feedback resistors with resistor-diode networks, the effective feedback resistance decreases as the input
signal increases. If this network is placed across R i, then an increasing gain function will be created. If the
network is placed across Rf, then a decreasing gain function will be created. By combining several
resistor-diode sections, complex transfer curves can be created.
Reference
Section 7.4, Function Generation
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) General purpose switching diodes (1N914, 1N4148, etc.)
(2) 5.1 volt Zener diodes (NZX5V1B or 1N5231)
(2) 3.3 volt Zener diodes (NZX3V3B or 1N5226)
(2) 1µ F actual:__________________ __________________
(1) 4k7  actual:__________________
(2) 10k  actual:__________________ __________________
(1) 12k  actual:__________________
(1) 15k  actual:__________________
(1) 22k  actual:__________________

(1) 33k  actual:__________________
(1) 47k  actual:__________________
(1) 56 k actual:__________________

NZX Series Datasheet: https://assets.nexperia.com/documents/data-sheet/NZX_SER.pdf
Schematics
Figure 1
Figure 2

Procedure
Biased Diode Network

1. Calculate the break-points and slopes for the input/output transfer curve of the circuit in Figure 1.
Record these values in Table 1.
3. Set the generator to a 1 volt peak 100 Hz triangle wave.
4. While monitoring the output of the op amp, increase the amplitude of the triangle wave and note how
the shape of the wave changes. Save the display of the output voltage as Graph 1.
5. Switch the oscilloscope to XY mode. Switch the inputs to ground in order to center the spot. Connect
the input voltage to the X (horizontal) channel, and the output of the op amp to the Y (vertical)
channel.
6. Switch the input channels to DC Coupled. Save the resulting input/output transfer curve as Graph 2.
Zener Diode Network

7. Calculate the break-points and slopes for the input/output transfer curve of the circuit in Figure 2.
Record these values in Table 2.
9. Switch the oscilloscope back to Volts vs. Time mode.
10. Repeat steps 3 through 6, saving the displays as Graphs 3 and 4, respectively.
Troubleshooting
11. Continuing with the circuit of Figure 2, estimate and then measure the results for each individual
error presented in Table 3.

Data Tables
Base voltage gain
Positive break-point
Gain beyond positive break-point
Negative break-point
Gain beyond negative break-point
Table 1
Base voltage gain
First break-point
Gain beyond first break-point
Second break-point
Gain beyond second break-point
Table 2

33k swapped
Vout
with 47k
22k swapped
Vout
with 56k
One 5V1 Zener

Vout
backwards
Table 3
Questions
1. What would happen in Figure 1 if the 12k  and 4k7  were swapped?
2. What happens in Figure 2 when the 33k  and 47k  are swapped?
3. Does the value of the DC power supply have any effect on the break-points of the circuit of Figure 1?
4. What is the effect of increasing the 22k  in Figure 2?
5. What would the transfer curve look like if Figures 1 and 2 were cascaded?

The Linear Regulator
Objective
In this exercise, the performance of a simple op amp-based linear regulator will be examined. The
investigation will include the effect of scaling resistors on the load voltage and the usage of a current pass
transistor.
Theory Overview
Regulators are used to create a stable, clean DC voltage to power other electronic systems. The regulator
voltage should not change as its load changes. A linear regulator may be based on a series-parallel
feedback loop, using an op amp as a controller. The op amp compares a scaled version of the load voltage
to a reference voltage. By changing either the reference or the scaling factor, a range of load voltages may
be obtained. Because op amps typically produce insufficient current to drive many loads, a current pass
transistor is used to boost output current capability.
Reference
Section 8.3, Linear Regulators
Equipment
(1) Adjustable DC power supply model:________________ srn:__________________
(1) DMM model:________________ srn:__________________
Components
(1) Medium power NPN transistor (2N5190G-2N5192G)
(1) Zener diode around 5.1 volts (NZX5V1B, 1N751)
(2) 1µ F actual:__________________ __________________
(1) 2k2  actual:__________________
(2) 47k  actual:__________________ __________________
(2) 100k  actual:__________________ __________________
(1) 100  5 watt actual:__________________
2N5192G Datasheet: http://www.onsemi.com/pub_link/Collateral/2N5191-D.PDF
NZX5V1B Datasheet: https://assets.nexperia.com/documents/data-sheet/NZX_SER.pdf

Schematic
Figure 1
Procedure
1. In this exercise, a DC source is being used to simulate the output of a rectified and filtered power
source in the interest of simplicity.
2. Note that the op amp is acting as a series-parallel feedback amplifier where the load voltage is equal
to VZener(1+Rscale/47k ). Changes to the load resistor should cause no change in the load voltage.
Also, note that Iout is equal to the transistor’s  times the output current of the op amp. The transistor
is therefore being used as a current booster, and because it is located inside of the feedback loop, it
should not affect the load voltage.
3. Connect the circuit of Figure 1 using an Rscale of 47k , and an R load of 100k .
4. Calculate and record the values for Vload, Iload, Iout, and Iout-op-amp in Table 1. A typical  would be in the
range of 50 to 100, depending on the pass transistor used.
5. Measure and record the values for Vload, Iload, Iout, and Iout-op-amp (i.e., at point A) in Table 2.
6. Change R scale to 100k  and repeat steps 4 and 5.
7. Change R scale back to 47k , change R load to 100  and repeat steps 4, 5, and 6.

Computer Simulation
8. One limitation of the preceding exercise is that it does not show how well the regulator suppresses AC
ripple that might exist on the input power source. This can be accomplished easily in a simulator.
Build the circuit in a simulator using R load equal to 100  and R scale equal to 100k . To create the
ripple, simply insert an AC power source in series with the 20 volt DC source (i.e., inserted between
ground and the negative terminal of the 20 volt source). Set the AC source to 120 Hz and 2 volts
peak. This will mimic filtered full-wave rectified 60 Hz power ripple. Run a Transient Analysis to
determine the load voltage. In the technical report, include a plot of the simulated load voltage along
with the voltage applied to the collector of the pass transistor.
Data Tables
R load R scale V load I load I out I out-op-amp
100k  47k 
100k  100k
100  47k 
100  100k 
Table 1 (Theoretical)

R load R scale V load I load I out I out-op-amp
100k  47k 
100k  100k 
100  47k 
100  100k 
Table 2 (Experimental)
Questions
1. How do the load voltage and current vary with the scale resistor?
2. How do the load voltage and current vary with the load resistor?
3. What is the relationship between I out and I out-op-amp?
4. What is the relationship between I out and I load?
5. How could this circuit be modified to produce a load voltage of 12 volts?
6. What is the maximum load current that can be obtained without damage to any of the devices?

The Triangle-Square Generator
Objective
In this exercise, a simultaneous triangle-square wave generator is examined. The investigation will
include the effect of capacitance on output frequency, and the role of op amp speed in determining ideal
wave shapes.
Theory Overview
The triangle-square generator consists of two main parts: a comparator and a ramp generator or integrator.
The circuit is self-sustaining by nature. The ramp generator requires a square wave input. It gets this
signal from the comparator. The comparator in turn generates the square wave from the triangle wave
appearing at the output of the ramp generator. The output frequency is determined primarily by the RC
timing values of the ramp generator, and secondarily by the switching thresholds of the comparator. The
practical output frequency limit is set by the bandwidth and slew rate of the op amps. At higher
frequencies, slew rate limiting will noticeably slow the edges of the square wave. This will impact the
output of the ramp generator and will affect both the linearity of the wave shapes and the output
frequency.
Reference
Section 9.2, Op Amp Oscillators
Equipment
(1) DMM model:________________ srn:__________________
Components
(2) Low speed op amps (741)
(2) Medium speed op amps (351, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(1) 1n F actual:__________________
(1) 10n F actual:__________________
(1) 10k  actual:__________________
(1) 22k  actual:__________________
(1) 33k  actual:__________________

Schematic
Figure 1
Procedure
1. Using 10n F for the capacitor, determine the theoretical output frequency and the peak value of the
triangle wave. Record these items in Table 1.
2. Construct the circuit of Figure 1 using the 10n F capacitor and the medium speed op amps.
3. Record the output frequency and amplitude of the triangle wave in Table 1 and determine the
deviation between the theoretical and experimental results.
4. Save a copy of the oscilloscope displaying the triangle and square waves as Graph 1.
5. Replace the capacitor with the 1n F unit. Determine the theoretical output frequency and the peak
value of the triangle wave using this new value, and record the results in Table 2.
6. Record the output frequency and amplitude of the triangle wave in Table 2 and determine the
deviation between the theoretical and experimental results.
7. Save the triangle and square wave display as Graph 2. Pay particular attention to the leading and
trailing edges of the square wave. Are the wave shapes identical to those created with the first
capacitor?

8. Return the 10n F capacitor to the circuit, replacing the 1n F unit.
9. Replace the medium speed op amps with the low speed op amps.
10. Save the triangle and square wave display as Graph 3. Pay particular attention to the leading and
trailing edges of the square wave. Are the wave shapes identical to those created with the faster op
amps?
Troubleshooting
11. Estimate and then measure the results for each individual error presented in Table 3.
Data Tables
Theoretical Experimental % Deviation
fout
Vout
Table 1
fout
Vout
Table 2

10k swapped Square

with 22k Output
33k swapped Triangle

with 22k Output
Input pins of Square

Op Amp 2
swapped Output
Table 3
Questions
1. How does the oscillation frequency vary with capacitance?
2. What sets the output amplitude of the triangle and square waves?
3. By comparing Graphs 1 and 12, what sorts of non-ideal behavior occur at higher output frequencies?
4. By comparing Graphs 1 and 3, what are the advantages of using a medium speed op amp such as a
351 over a slower device such as a 741?
5. In general, what do you think the output waveforms would look like if the low speed op amps had
been used with the 1n F capacitor?

The Wien Bridge Oscillator
Objective
In this exercise, a Wien bridge sine wave generator is examined. The investigation will include the effect
of capacitance on output frequency and gain control of the op amp.
Theory Overview
The Wien bridge is a four element resistor-capacitor network that can be thought of as a combination of
lead and lag networks. As such, it attenuates very high and very low frequencies. At its critical frequency,
where the magnitude of Xc equals R, the bridge voltage produces no phase shift and exhibits a modest
signal loss of 1/3. An op amp with a voltage gain of 3 may be used to overcome this loss, and as long it
produces no additional phase shift, the system can produce stable oscillation at the critical frequency. A
non-inverting amplifier is ideally suited to this task. The gain needs to be slightly greater than 3 to begin
oscillation and should fall back to 3 to maintain oscillation. The gain variation may be achieved through
the use of limiting diodes in the negative feedback network.
Reference
Section 9.2, Op Amp Oscillators
Equipment
(1) DMM model:________________ srn:__________________
Components
(1) Low speed op amp (741)
(1) Medium speed op amp (351, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(2) 1n F actual:__________________ __________________
(2) 10n F actual:__________________ __________________
(2) 100n F actual:__________________ __________________
(1) 2k7  actual:__________________
(1) 5k6  actual:__________________
(3) 10k  actual:__________________ __________________ __________________

Schematic
Figure 1
Procedure
1. Determine the theoretical output frequency for the circuit of Figure 1. Also, estimate the output
amplitude. Record these in Table 1.
2. Construct the circuit of Figure 1 using the medium speed op amp.
3. Record the output frequency and amplitude of the sine wave in Table 1 and determine the deviation
between the theoretical and experimental results.
4. Save a copy of the oscilloscope display of the output wave as Graph 1.
5. Replace the capacitors with the 10n F units. Determine the theoretical output frequency using this
new value and record the result in Table 2.
6. Record the output frequency and amplitude of the wave in Table 2 and determine the deviation
8. Replace the capacitors with the 1n F units. Determine the theoretical output frequency using this new
value and record the result in Table 2.

9. Record the output frequency and amplitude of the wave in Table 2 and determine the deviation
11. Replace the medium speed op amp with the low speed op amp and examine the output.
12. Save a copy of the oscilloscope display of the output wave as Graph 4. Swap out the capacitors with
the 10n F and then the 100 nF units. Are the wave shapes identical to those created with the faster op
amp?
13. In order for this circuit to oscillate, the forward gain of the op amp must compensate for the loss
through the Wien bridge, in this case, a gain of 3 is required. To verify this, open the 5k6 resistor.
This will drop the gain to about 1 and oscillation should cease.
Computer Simulation
14. One of the trickier parts of this oscillator is getting the op amp gain adjusted properly. If it is too high,
the signal will be distorted. In this circuit, the initial gain is greater than 3 but as the signal grows, the
two diodes turn on, partially shunting the 2k7 and reducing the effective value of R f, and hence, the
voltage gain. To demonstrate this, build the circuit in the simulator with a 741 op amp and 10n F
capacitors. First perform a Transient Analysis and inspect the output wave shape. Replace the 2k7
with larger values and note the effect on the wave shape. Finally, return the resistor to 2k7, delete the
two diodes and observe the new wave shape.
Data Tables
fout
Vout
Table 1

fout
Vout
Table 2
fout
Vout
Table 3
Questions
1. How does the oscillation frequency vary with capacitance?
2. By comparing Graphs 1, 2, and 3, what sorts of non-ideal behavior occur at higher output
frequencies?
3. By comparing Graphs 3 and 4, what are the advantages of using a medium speed op amp such as a
351 over a slower device such as a 741?
4. In general, what do you think the output waveforms would look like if the medium speed op amp had
been used with a 100p F capacitor?

The Integrator
Objective
In this exercise, the concept of waveform integration will be examined. The investigation will include the
effect of frequency on accurate and useful integration. Several waveshapes will be utilized.
Theory Overview
The concept of integration is usually described as “finding the area under the curve”. There are many uses
for this function, including waveshaping and analog computing. An ordinary amplifier ideally changes
only the amplitude of the input signal. An integrator can change the waveform of the input signal, for
example, turning a square wave into a triangle wave. A practical integrator cannot be used at just any
frequency. There exists a useful range of integration, outside of which the circuit does not produce the
desired effect.
Reference
Section 10.2, Integrators
Equipment
(1) DMM model:________________ srn:__________________
Components
(1) Medium speed FET-input op amp (351, 411, 081, etc.)
(2) 1 µF actual:__________________ __________________
(1) 10 nF actual:__________________
(1) 910  actual:__________________
(1) 1 k actual:__________________
(1) 10 k actual:__________________

Schematic
Figure 1
Procedure
1. Derive the equation for Vout for the circuit of Figure 1. Calculate the lowest usable (“integratable”)
frequency, flow. Record these items in Table 1.
2. Calculate the integrator’s output voltage for the following inputs and record them in
Table 2:
• 1 volt peak sine wave at 2 times flow
• 1 volt peak sine wave at 10 times flow
• 1 volt peak square wave at 2 times flow
• 1 volt peak square wave at 10 times flow
1. Assemble the integrator circuit.
2. Save the display of the output of the integrator for each of the inputs listed in step 2, above. Call these
Graphs 1 through 4, respectively. It is very important to note the phase of the output waveform with
respect to the input waveform.
3. Apply a 1 volt peak sine wave one decade below flow. Save the output signal as Graph 5. Does the
circuit appear to be integrating?
4. Apply a 1 volt peak square wave one decade below flow. Save the output signal as
Graph 6. Does the circuit appear to be integrating?

Data Tables
Equation for Vout
flow
Table 1
Input Signal Output Signal
1 volt peak sine wave at 2 times flow
1 volt peak sine wave at 10 times flow
1 volt peak square wave at 2 times flow
1 volt peak square wave at 10 times flow
Table 2
Questions
1. What happens to the accuracy of integration as the input frequency is increased?
2. At very low frequencies, does the integrator behave more like a true integrator, or like an amplifier?

3. What are the advantages of using a medium speed FET-input op amp such as a 351 over a slower
bipolar device such as a 741?
4. What is the purpose of the 10 k resistor?
5. What is the purpose of the 910  resistor?

The Differentiator
Objective
In this exercise, the concept of waveform differentiation will be examined. The investigation will include
the effect of frequency on accurate and useful differentiation. Several waveshapes will be utilized.
Theory Overview
The concept of differentiation is usually described as “finding the slope of the curve.” There are many
uses for this function, including waveshaping and analog computing. An ordinary amplifier ideally
changes only the amplitude of the input signal. A differentiator can change the waveform of the input
signal, for example, turning a triangle wave into a square wave. A practical differentiator cannot be used
at just any frequency. There exists a useful range of differentiation, outside of which the circuit does not
produce the desired effect.
Reference
Section 10.3, Differentiators
Equipment
(1) DMM model:________________ srn:__________________
Components
(1) Medium speed FET-input op amp (351, 411, 081, etc.)
(2) 1 µF actual:__________________ __________________
(1) 10 nF actual:__________________
(1) 1.5 nF actual:__________________
(1) 100  actual:__________________
(1) 1 k actual:__________________

Schematic
Figure 1
Procedure
1. Derive the equation for Vout for the circuit of Figure 1. Calculate the highest usable (“differentiable”)
frequency, fhigh. Record these items in Table 1.
2. Calculate the differentiator’s output voltage for the following inputs and record them in
Table 2:
• 1 volt peak sine wave at one-half fhigh
• 1 volt peak sine wave at one-tenth fhigh
• 1 volt peak triangle wave at one-half fhigh
• 1 volt peak triangle wave at one-tenth fhigh
1. Assemble the differentiator circuit.
2. Save the display of the output of the differentiator for each of the inputs listed in step 2. Call these
Graphs 1 through 4, respectively. It is very important to note the phase of the output waveform with
respect to the input waveform.
3. Apply a 1 volt peak sine wave one decade above fhigh. Save the output signal as Graph 5. Does the
circuit appear to be differentiating?
4. Apply a 1 volt peak triangle wave one decade above fhigh. Save the output signal as
Graph 6. Does the circuit appear to be differentiating?

Data Tables
Equation for Vout
fhigh
Table 1
Input Signal Output Signal
1 volt peak sine wave at 1/2 fhigh
1 volt peak sine wave at 1/10 fhigh
1 volt peak triangle wave at 1/2 fhigh
1 volt peak triangle wave at 1/10 fhigh
Table 2
Questions
1. What happens to the accuracy of differentiation as the input frequency is decreased?
2. At very high frequencies, does the differentiator behave more like a true differentiator, or like an
amplifier?

3. What are the advantages of using a medium speed FET-input op amp such as a 351 over a slower
bipolar device such as a 741?
4. What is the purpose of the 100  resistor?
5. What is the purpose of the 1.5 nF capacitor?

VCVS Filters
Objective
In this exercise, the performance of VCVS equal-component high and low pass filters will be examined.
The investigation will include the realization of wide bandwidth band pass filters as well.
Theory Overview
Sallen and Key VCVS filters are very straightforward to implement, utilizing a single op amp to create
second order high or low pass filters. The filters are based around a series-parallel non-inverting
amplifier. In the equal component variation, the damping or alignment of the filter is set by the
amplifier’s pass band voltage gain. The corner frequency of the filter is set by the tuning resistors and
capacitors.
Reference
Section 11.6, Realizing Practical Filters
Equipment
Components
(2) General purpose op amps (741, 351, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(2) 10n F actual:__________________ __________________
(2) 100n F actual:__________________ __________________
(2) 1k5  actual:__________________ __________________
(2) 2k2  actual:__________________ __________________
(1) 5k6  actual:__________________
(1) 6k8  actual:__________________
(1) 10k  actual:__________________
(1) 12k  actual:__________________

Schematics
Figure 1
Figure 2

Procedure
Low Pass Filter

1. The circuit of Figure 1 is a second order low pass filter. Calculate and record the corner frequency (f2)
and mid-band voltage gain in Table 1.
3. To measure the mid-band voltage gain, set the generator to a 1 volt sine wave at about one decade
below f2. Measure the output of the filter and calculate the voltage gain. Record this in Table 1.
4. While monitoring the filter output with the dB meter, sweep the generator frequency about f2 until the
output has fallen 3 dB from its mid-band value. Record this frequency in Table 1.
5. In Table 2, record the dB gain of the filter at 5 frequencies between 0.1 f2 and f2, and at 5 frequencies
between f2 and 10 f2. Using these data, create a semi-log plot of the frequency response of the filter.
Note, it may be convenient when graphing if at least some of these frequencies are simple octaves
apart, such as 5 f2 and 10 f2.
6. Do not disassemble the circuit.
High Pass Filter

7. The circuit of Figure 2 is a second order high pass filter. Calculate and record the corner frequency
(f1) and mid-band voltage gain in Table 3.
9. To measure the mid-band voltage gain, set the generator to a 1 volt sine wave at about one decade
above f1. Measure the output of the filter and calculate the voltage gain. Record this in Table 3.
10. While monitoring the filter output with the dB meter, sweep the generator frequency about f1 until the
output has fallen 3 dB from its mid-band value. Record this frequency in Table 3.
between f1 and 10 f1. Using these data, create a semi-log plot of the frequency response of the filter.

Band Pass Filter
12. Cascade the high pass and low pass filters.
13. Take several gain readings on both sides of f1 and f2, and record these in Table 5. Again, using these
data, create a semi-log plot of the frequency response of the filter.
Computer Simulation
14. Build the circuit of Figure 1 in a simulator and run an AC Analysis. Be sure to run the plot from 100
Hz to approximately 100 kHz and use a decibel scale for the gain amplitude. Compare the plot to the
graph generated from Table 2.
Data Tables
Theoretical Experimental
f2
Av
Table 1

Frequency Gain
Table 2
f1
Av
Table 3

Frequency Gain
Table 4

Frequency Gain
Table 5

Questions
1. What is the approximate attenuation slope above f2?
2. What is the approximate attenuation slope below f1?
3. What would be the result of the cascade if the critical frequencies of the two filters were mistakenly
transposed?

The Multiple Feedback Filter
Objective
In this exercise, the performance of basic band-pass filters will be examined. The investigation will
include the investigation of variable Q or bandwidth.
Theory Overview
Multiple feedback filters are very straightforward to implement, utilizing a single op amp to create second
order band-pass filters. The filters are based around a parallel-parallel inverting amplifier. The center
frequency of the filter is set by the tuning resistors and capacitors.
Reference
Section 11.7, Band-Pass Filter Realizations
Equipment
Components
(1) Medium speed op amp (351, 411, 081, etc.)
(2) 1µ F actual:__________________ __________________
(2) 10n F actual:__________________ __________________
(2) 100n F actual:__________________ __________________
(1) 470  actual:__________________
(1) 1k2  actual:__________________
(1) 2k2  actual:__________________
(1) 22k  actual:__________________
(1) 39k  actual:__________________
(1) 47k  actual:__________________
(1) 75k  actual:__________________

Schematic
Figure 1
Procedure
1. The circuit of Figure 1 is a second order band pass filter. Calculate and record the center frequency
(f0) and mid-band voltage gain in Table 1.
2. Assemble the circuit of Figure 1 using the medium speed op amp.
3. While monitoring the filter output with the dB meter, sweep the generator frequency about the
expected f0 until a peak is found. Record this frequency in Table 1. Measure the output amplitude,
determine the gain and record this in Table 1 as well.
between f0 and 10 f0. Using these data, plot a graph of the filter response, and determine the
bandwidth and Q of the filter.
5. Replace the capacitors with the 100n F units and repeat steps 3 and 4 using Tables 3 and 4.
6. The circuit resistors set the Q of the filter. To alter the Q of this circuit, replace the 2k2 with 1k2, the
22k with 39k, and the 47k with 75k.
7. Repeat steps 3 and 4 using Tables 5 and 6.

Computer Simulation
8. Build the circuit of Figure 1 in a simulator and run an AC Analysis. Be sure to run the plot from 10
Hz to approximately 100 kHz and use a decibel scale for the gain amplitude. Compare the plot to the
graph generated from Table 2.
Data Tables
f0
Av
Table 1
Frequency Gain
Table 2

f0
Av
Table 3
Frequency Gain
Table 4

f0
Av
Table 5
Frequency Gain
Table 6

Questions
1. For the original circuit, what is the approximate attenuation slope above f0?
2. For the original circuit, what is the approximate attenuation slope below f0?
3. What is the relationship between circuit capacitance and center frequency f0?
4. How does bandwidth change as Q is altered?
5. Does the ultimate attenuation slope (i.e., at the frequency extremes) change as the Q is altered?

The State-Variable Filter
Objective
In this exercise, the performance of a state-variable filter will be examined. The investigation will include
the effect of varying Q and tuning frequency.
Theory Overview
The state-variable filter, also known as the universal filter, provides several outputs, including high-pass,
low-pass, and band-pass connections. The filter offers independent control over bandwidth (Q) and tuning
frequency (fc). State-variable filters are ideal for applications requiring stable, high Q response.
Reference
Section 11.7, Band-Pass Filter Realizations
Equipment
Components
(1) General purpose quad op amp (LM348, TL084, LF347, etc.)
(2) 1 µF actual:__________________ __________________
(2) 10 nF actual:__________________ __________________
(1) 680  actual:__________________
(2) 4.7 k actual:__________________ __________________
(2) 6.8 k actual:__________________ __________________
(2) 10 k actual:__________________ __________________
(2) 15 k actual:__________________ __________________
(1) 50 k dual potentiometer

Schematic
Figure 1
You will find the following formulas useful:
fc = 1/(2RtCt)
Av (band-pass gain) = R2R4/(R1R3)
Q = (Rx+R4)/(2Rx); where Rx = Rq||R3
Procedure
Band-pass Output
2. Calculate the frequency range, Q range, and band-pass gain of the filter. Record these values in
Table 1. Note that Rt varies from 6.8 k to 56.8 k, and that Rq varies from 680  to 10.68 k.
3. Set Q to its highest value. This can be accomplished by adjusting the Q potentiometer for minimum
resistance.
4. Apply a 0 dBV sine wave at approximately 1 kHz to the input.

5. Set the filter tuning to its highest value. This can be accomplished by adjusting R t to minimum.
6. Sweep the input frequency until a peak output is found. Record this frequency and amplitude in
Table 2.
7. Record the –3 dB, –6 dB, and –10 dB frequencies on either side of the peak, in Table 2. These
amplitudes are relative to the level found at the peak.
8. Set the Q adjust to its lowest value (i.e., Rq at maximum) and repeat steps 4 through 7, using Table 3
to record your results.
9. Set the filter tuning to its minimum value (i.e., R t at maximum) and repeat steps 4 through 8, using
Tables 4 and 5 to record your results.
10. If a spectrum analyzer is available, verify your readings.
High- and Low-pass Outputs

11. Utilize the HP output.
12. Apply a 10 kHz sine wave to the input and adjust the amplitude for a filter output of 0 dBV.
13. By sweeping the input frequency, determine the −3 dB frequencies for Rt at both extremes. Record
these values in Table 6.
14. Determine the attenuation slope by measuring the output signal amplitude using a frequency one
decade below the −3 dB frequency. Record this in Table 6.
15. Utilize the LP output.
16. Apply a 100 Hz sine wave to the input and adjust the amplitude for a filter output of 0 dBV.
17. By sweeping the input frequency, determine the −3 dB frequencies for Rt at both extremes. Record
these values in Table 6.
18. Determine the attenuation slope by measuring the output signal amplitude using a frequency one
decade above the −3 dB frequency. Record this in Table 6.
19. If a spectrum analyzer is available, verify your readings.

Data Tables
Maximum Q
Minimum Q
Maximum fc
Minimum fc
Band-pass
Gain
Table 1
Item Frequency Amplitude
Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 2

Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 3

Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 4

Peak
−3 dB, below
−6 dB, below
−10 dB, below
−3 dB, above
−6 dB, above
−10 dB, above
Table 5
f3db for Rt at minimum
f3db for Rt at maximum
Attenuation slope
f3db for Rt at minimum
f3db for Rt at maximum
Attenuation slope
Table 6

Questions
1. What is the effect as Rq is decreased?
2. What is the effect as Rt is decreased?
3. How does this filter compare to high- and low-pass VCVS filters?
4. How could this circuit be changed in order to control pass-band gain?
5. What effect would altering Rtb have on circuit function?
6. Why is the state-variable filter referred to as a universal filter?

Appendix A: Creating Graphs Using a Spreadsheet
While nothing beats good data plotting and analysis software (check out SciDAVis for an excellent free
program), you can also create a variety of graphs using spreadsheets such as the one in Open Office or
Excel (Microsoft Office). What follows works for Excel 2007 and Open Office 4. Other versions may
have different menus and options. Here's how to take your tabular data from lab and create a graph. These
instructions assume you will set the independent axis on the horizontal and the dependent axis as the
vertical. This is the typical case but there are exceptions (see note at end). Remember, the independent
axis presents the input parameter you set (e.g., a power supply voltage or a mass) and the dependent axis
presents the output parameter (i.e., the item you are interested in and have measured as an outcome such
as a resulting current or change in position).
1. Open a new worksheet. In the first column (column A), enter the text for the legend. This is particularly
important if you're plotting multiple datasets on a single graph. Starting in the second column (column B),
enter values for the horizontal (independent) axis on the first row of the worksheet. In like fashion, enter
values for the vertical (dependent) axis on the second row. For multiple trials, enter the values on
subsequent rows. For example, if you are setting a series of voltages in a circuit and then measuring the
resulting currents, the voltages would be in row one and the currents in row two. If you changed the
circuit components, reset the voltages, remeasured the currents and wish to compare the two trials, then
the new set of currents would be in row three and so on. Each of these rows would have their identifying
legend in column A with the numeric data starting in column B. Specifically, the legend text for the first
data set would be in cell $A$2 and the numeric values would be in cells $B$2 through $X$2 (where X is
the final data column), for the second set the legend text would be in cell $A$3 and the numeric values
would be in cells $B$3 through $X$3, etc.
2. Select/highlight all of the data (click the first cell, in the upper left corner, and drag the mouse over all
of the cells used).
3. Select the Insert menu and choose Chart. Ordinarily you will use an XY Scatter chart. There are other
options but this is the one you'll need in most cases. A simple Line chart is not appropriate in most cases.
You might get a graph that “sort of” looks correct but the horizontal axis will simply represent the
measurement sequence (first, second, third) rather than the value you set.
4. You can customize the appearance of the chart. In general, you can edit items by simply double-
clicking on the item or by using a right-mouse click to bring up a property menu. This will allow you to
add or alter gridlines, axes, etc. You can also stipulate variations such as using data smoothing, adding a
trend line, etc. It is possible to change the axes to logarithmic or alter their range; and fonts, colors and a
variety of secondary characteristics may be altered.
5. Once your chart is completed, you may wish to save the worksheet for future reference. To insert the
chart into a lab report, select the chart by clicking on it, copy it to the clipboard (Ctrl+C), select the
insertion point in the lab report, and paste (Ctrl+V).

6. In those odd instances where you need to reverse the dependent and independent axes such as a VI plot
of a diode where currents are set and resulting voltages are measured, but you want the voltage on the
horizontal, some spreadsheets have an axis swap function. If not, you'll need to swap the data ranges for
the chart axes. For example, following the instructions above, your independent/horizontal axis is row
one. The data are in cells $B$1 through $X$1. The dependent data are in cells $B$2 through $X$2. These
ranges can be seen in the chart's Data Series or Data Range menu or dialog box. It will say something
like: “X Values: =Sheet1!$B$1:$F$1” and “Y Values: =Sheet1!$B$2:$F$2”. Simply swap the row
numbers so that it says “X Values: =Sheet1!$B$2:$F$2” and “Y Values: =Sheet1!$B$1:$F$1”.
7. Data smoothing can be useful to remove the “jaggyness” of some plots. For simple curves, a second
degree B-Spline is suggested if you’re using Open Office. For data that are expected to be linear, a trend
line can be useful to better see the approximation.
Here is an example worksheet showing a plot of two resistors. The first plot is basic, the second uses
smoothed data with a linear trend line:

Appendix B: Manufacturer’s Datasheet Links
Diodes
NZX Series Datasheet: https://assets.nexperia.com/documents/data-sheet/NZX_SER.pdf
Transistors
2N3904 Datasheet: https://www.onsemi.com/pub/Collateral/2N3903-D.PDF
2N5192G Datasheet: http://www.onsemi.com/pub_link/Collateral/2N5191-D.PDF
Op amps
LM318 Datasheet: http://www.ti.com/lit/ds/symlink/lm318-n.pdf

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4 Laboratory Manual for Operational Amplifiers & LIC

Laboratory Manual for Operational Amplifiers & LIC 5

6 Laboratory Manual for Operational Amplifiers & LIC

Decibels and Bode Plots . . . . . . 8

Appendix A: Creating Graphs Using a Spreadsheet . . 128

Laboratory Manual for Operational Amplifiers & LIC 7

8 Laboratory Manual for Operational Amplifiers & LIC

Laboratory Manual for Operational Amplifiers & LIC 9

2. Assemble the circuit of Figure 1 using the 22k resistor.

5. Repeat step 4 for the remaining resistor values in Table 1.

7. Set the generator to a 1 kHz sine wave, 0 dBV.

10. Adjust the generator’s output level to 0 dBV.

10 Laboratory Manual for Operational Amplifiers & LIC

R Av Theory Av’ Theory Vout’ Experimental Av’ % Deviation

Laboratory Manual for Operational Amplifiers & LIC 11

12 Laboratory Manual for Operational Amplifiers & LIC

14 Laboratory Manual for Operational Amplifiers & LIC

2N3904 Datasheet: https://www.onsemi.com/pub/Collateral/2N3903-D.PDF

Laboratory Manual for Operational Amplifiers & LIC 15

16 Laboratory Manual for Operational Amplifiers & LIC

2. Assemble the circuit of Figure 1.

6. Assemble the circuit of Figure 2.

7. Set the generator to a 1 kHz sine wave, 20 millivolts peak.

10. Measure the AC voltage at collector one and record it in Table 3.

Laboratory Manual for Operational Amplifiers & LIC 17

13. Repeat steps 9 through 11 recording the results in Table 4.

DC Quantity Theoretical Experimental % Deviation

18 Laboratory Manual for Operational Amplifiers & LIC

Laboratory Manual for Operational Amplifiers & LIC 19

Q1’s 4k7 is 470 VC1 DC

Both 4k7 are 470 VC1 DC

4. What is the significance of a high CMRR?

20 Laboratory Manual for Operational Amplifiers & LIC

22 Laboratory Manual for Operational Amplifiers & LIC

LM741 Datasheet: http://www.ti.com/lit/ds/symlink/lm741.pdf

Laboratory Manual for Operational Amplifiers & LIC 23

2. Assemble the circuit of Figure 1.

Connection Node Voltage

24 Laboratory Manual for Operational Amplifiers & LIC

2. What happens when V1 < V2? Why?

Laboratory Manual for Operational Amplifiers & LIC 25

4. Explain the differences in the waveforms recorded in Graphs 1 through 3.

26 Laboratory Manual for Operational Amplifiers & LIC

For Distortion Measurement Only

28 Laboratory Manual for Operational Amplifiers & LIC

LM741 Datasheet: http://www.ti.com/lit/ds/symlink/lm741.pdf

Laboratory Manual for Operational Amplifiers & LIC 29

2. Assemble the circuit of Figure 1 using the 4k7  resistor.

3. Set the generator to a 1 kHz sine wave, 100 millivolts peak.

5. Repeat step 4 for the remaining Rf values in Table 1.

7. Set the generator to a 1 kHz sine wave, 100 millivolts peak.

9. Repeat step 8 for two other op amps.

11. Set Rf to 4k7 .

12. Set the generator to a 200 Hz sine wave, 1 volt peak.

30 Laboratory Manual for Operational Amplifiers & LIC

16. Repeat steps 14 and 15 using the remaining Rf values in Table 4.

Rf Theoretical Av Vout Experimental Av % Deviation

Laboratory Manual for Operational Amplifiers & LIC 31

32 Laboratory Manual for Operational Amplifiers & LIC

Ri’s third band is

fin is 100 Hz Vout

2. How does the voltage gain vary as the op amp is changed?

5. What is the relationship between gain, feedback and distortion?

Laboratory Manual for Operational Amplifiers & LIC 33

34 Laboratory Manual for Operational Amplifiers & LIC

2. Assemble the circuit of Figure 1 using the 4k7  resistor.

3. Set the generator to a 1 kHz sine wave, 100 millivolts peak.