Microprocessor Interfacing & Embedded System

CSE 331/EEE 332/EEE 453/ETE 332

Summer 2020
Faculty: RSF

Lecture 3

1
 Concepts: RAM 6116, Internal Architecture

CS/ WR/
C-BUS SMDEC : selects one memory out of 211 memories
A10 RD/
First location: 000 0000 0000 H = 000 H
D7
Second location: 000 0000 0001 H = 001 H
RAM 6116 …………………………………………………………………
A-BUS D-BUS …………………………………………………………………
Last location: 111 1111 1111 H = 7FF H

D0
A0

A-BUS (11), C-BUS (2), D-BUS (8)

Total no. of memory location = ?
Total available memory space = ?
Chip select: CS/ = 0 means RAM 6116 is selected;
CS/ = 1 means RAM 6116 is NOT selected;

2
 Concepts: Memory Mapping, MPU 8086 to RAM 6116
PMDEC
MPU-8086
A12-A19 RAM 0 RAM 1
M-IO/ MS1/ 00000 H 00001 H
Ao
CLK/
MS0/ 00002 H 00003 H
BHE/
00004 H 00005 H
RST/ ………………………………….
D8 –D15
………………………………….
RD/ CS/ RD/
RD/ CS/ ………………………………….
WR/ WR/ WR/
? ?
D0 -D7 D0 -D7 D8 –D15
A1-A11 A0-A10 A0-A10
All addresses in RAM0 is Even
All addresses in RAM1 is Odd
M-IO/= ? RAM0- 6116 RAM1- 6116
EVEN ODD

MPU – PMDEC – SMDEC (RAM 6116) – Specific memory

Selection through PMDEC : RAM0- 6116 (A0 =0), RAM1- 6116 (A0=1)
First location in RAM0 -6116 : A19…………….A2A1A0 = 0000 0000 0000 0000 0000 B = 00000 H
First Location in RAM1- 6116 : A19…………….A2A1A0 = 0000 0000 0000 0000 0001 B = 00001 H

3
 PMDEC
Concepts: Memory Mapping, MPU 8086 to RAM 6116
MPU-8086
A12-A19
M-IO/ MS1/
Ao MS0/
CLK/
BHE/

RST/
D8 –D15
(A19……A12)(A11……A1)(A0)
RD/ RD/ CS/ RD/
CS/
WR/ WR/ WR/

D0 -D7 D0 -D7 D8 –D15

A1-A11 A0-A10 A0-A10

RAM0- 6116 RAM1- 6116

EVEN ODD

A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 BANK
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EVEN) = 00000 H
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 (ODD) = 00001 H
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 (EVEN) = 00002 H
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 (ODD) = 00003 H
………………………………………………………………………………………………………………………………………………………………………….
………………………………………………………………………………………………………………………………………………………………………….
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 (EVEN) = 00FFE H
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 (ODD) = 00FFF H

4
 Concepts: Memory Mapping, MPU 8086 to RAM 6116
PMDEC
MPU-8086
A12-A19
M-IO/ MS1/
Ao MS0/
CLK/
BHE/

RST/
D8 –D15

RD/ RD/ CS/ RD/

CS/
WR/ WR/ WR/

D0 -D7 D0 -D7 D8 –D15

A1-A11 A0-A10 A0-A10

RAM0- 6116 RAM1- 6116

EVEN ODD
BHE/ : Byte High Enable,
Data Bus (D0 –D7) exchange data with even bank (RD/ & WR/), BHE/= 1 (deactivated) It means exchanges the higher
Data Bus (D8 –D15) exchange data with odd bank (RD/ & WR/), BHE/= 0 (activated) byte with odd bank.

Both data bus (D0 - D15) will be used to exchange data from two consecutive memory locations (odd & even both)

5
 Concepts: Word Operation, Byte Operation

00000 H 00001 H
00002 H 00003 H
00004 H 00005 H
00006 H 00007 H
… …
... … Page 2 Page 3
… …
… …

EVEN BANK ODD BANK Book

Word Operation (16 bits operation/cycle): Read/Write 16 bits all at once in 1 cycle starting from/to even memory location
Byte Operation (8 bits operation/cycle): Read/Write 8 bits at once in 1 cycle from/to either even/odd bank