Homework 1 Outline of Solutions .

1. Using 6 bits to represent each number, write representations of 9 and -9, in 1’s
complement, 2’s complement, signed magnitude notation.

In 2’s complement , 1’s complement, and signed magnitude the number 9 is represented
as 001001
In 2’s complement, -9 is represented as 110111
In 1’s complement, -9 is represented as 110110
In signed magnitude, -9 is represented as 101001

2. Question 2.36 from textbook.

(a) AND with 11111011
(b) OR with 01000100
(c) AND with 00000000
(d) OR with 11111111
(e) AND the BUSYNESS pattern with 00000100 to isolate b2. Then add that result to
itself 5 times.

3. Question 2.38 from textbook

Let N = n & 1000, M = m & 1000
Overflow = (N AND M) OR ((N OR M) AND ((NOT s) AND 1000))

4. Question 2.42 from textbook

The ASCII values are being added, rather than the integer values. (ASCII .5. is 53 in
decimal, and ASCII .8. is 56 in decimal, adding to 109, which is ASCII .m..)

5. Question 2.40(a) and 2.40(b) from textbook

(a) 2
(b) -17

6. Can you define the overflow conditions, when adding two 2’s complement numbers of
any length n, only in terms of the carry-in and carry-out of the sign bit (i.e., bit n-1) ?
Explain your answer.

If carry out of sign bit = carry into sign bit, then no overflow.
To see why this works, consider the two cases when we can have an overflow (1) add two
positive integers and result is negative or (2) add two negative integers and result is
positive.
For case (1): the MSB (i.e, the sign bit) is a 0 for both numbers. If we have a negative
result then it must mean that the carry into the sign bit was a 1, and the carry out was a 0
thus resulting in a 1 in the sign bit. Similar argument for case (2).

7. Arithmetic and logical operations: Let A = 01110101 and B = 11001001 be 2’s

complement integers. Compute the following. Assume a fixed width of 8 bits (i.e., your
answers must be 8 bits). Please show your work -- failure to do so means you get zero
points.
(a) A OR B (bitwise OR) (b) A AND B (bitwise AND) (c) A’+ B’ + 1 (B’ is complement of B)
 01110101
OR 11001001
= 11111101 (bitwise OR)

01110101
AND 11001001
= 01000001 (bitwise AND)

A’= 10001010
B’= 00110110
+1 00000001
= 11000001

8. Truth tables for (a) (A ORB) AND (NOT C) , (b) (A OR C) AND (A OR (NOT B))

A B C (A OR (a) ( A (A OR ( A OR (b) (A
B) OR B) (NOT B)) C) OR C)
AND AND
(NOT C) (A OR
NOT B)
0 0 0 0 0 1 0 0
0 0 1 0 0 1 1 1
0 1 0 1 1 0 0 0
0 1 1 1 0 0 1 0
1 0 0 1 1 1 1 1
1 0 1 1 0 1 1 1
1 1 0 1 1 1 1 1
1 1 1 1 0 1 1 1
 ork 2 Outline of Solutions
Homewo

1. Truth tablle for XOR:

A B XOR X
0 0 0
0 1 1
1 0 1
1 1 0

When is the
t ‘output’ =1 = ? When either
e of twoo conditions:: (1) A=0,B= =1 or (2) A=
=1,
B=0. Wh hen is the outtput =0? Wh
hen either off two series cconditions: ((1) A=0 and
B=0 or (2
2) A=1 and B=1.
B

For seriess conditions for output=0 0, the P typee transistor ‘ccloses’ whenn gate =0; thhe
N type clooses when gate=1. So fo or A=0,B=0 w we have twoo P transistorrs in series
with gate input to themm being A anda B. For A A=1,B=1, wee have two N transistors
in series with
w gate inp puts A,B. Th hese two are then laid ouut in parallel and
connected d to ground (i.e.,
( sink to ground).Thee output getss connected to ground (00)
when eithher of these two
t series off transistors aare switchedd.

For the caase when outtput=0, we have

h A=0 annd B=1..Thiss means A gooes to P typee
and B goees to N type – the series is connectedd to Voltage. Converse ffor A=1 and
B=0.

The resultting circuit is

i shown in Figure
F 1.
2. Design a circuit with three inputs (x,y and z) representing the bits in a binary
number, and three outputs (a,b and c) also representing bits in a binary number.
When the input is decimal 0,1, 2 or 3, expressed in binary, the output should be
one less than the input (with 0 generating an output of 7). When the input is 4,5,6
or 7, the output should be one more than the input (with 7 generating an output of
0). Show your truth table, the Boolean function for the above circuit, and the final
circuit (using only OR gates, AND gates, and NOT gates) – we need a circuit that
correctly implements the functionality (and not necessarily the most efficient
circuit).

Truth table – we need 3 bits to encode numbers 0 through 7.

x y z a b c
0 0 0 1 1 1
0 0 1 0 0 0
0 1 0 0 0 1
0 1 1 0 1 0
1 0 0 1 0 1
1 0 1 1 1 0
1 1 0 1 1 1
1 1 1 0 0 0

From truth table, we can derive the boolean function – examine all 1’s in the rows
for each of the outputs. The function is the OR of minterms (AND of conditions
of x,y,z where output=1).
Therefore, we get:
a = x’y’z’ + xy’z’ + xy’z + xyz’
b= x’y’z’ + x’yz + xy’z + xyz’
c = x’y’z’ + x’yz’ + xy’z’ + xyz’

The simple (non-optimized) circuits can be drawn based on the above three
boolean functions using AND and OR gates.

3. Access control cards for GW.

First consider how many different types of users there are – each of these users
will need to be assigned a ID, i.e., a binary code. There are 6 users: (1) Dean, (2)
dean’s assistant, (3) faculty, (4) computing facility staff, (5) students, (6)
researchers, (7) housekeeping staff. To encode 7 users, we need 3 bits.
We can assign the following encoding (note that the final circuits can change
based on your encoding):
 000 for Dean
 001 for Dean’s assistant
 010 for Faculty
 011 for Computing facility staff
 100 for students
  101 for researchers
 110 for housekeeping
 111 is not assigned to any user.

Next, how many outputs do we have ? Each output xi is associated with a specific area in
the building. Based on the user code (i.e., 3 bit number), the output associated with each
area is set to a 1 or 0. We have the following areas/outputs:
 X0 Public lobby
 X1 Teaching labs
 X2 Research labs
 X3 Faculty offices area
 X4 Dean’s Suite
 X5 supply closet
 X6 server room

Based on the access conditions described in the problem, we get the following truth table
(showing all outputs in one truth table)

a b c X0 X1 X2 X3 X4 X5 X6
0 0 0 1 1 1 1 1 0 0
0 0 1 1 1 1 1 1 1 0
0 1 0 1 1 1 1 0 0 0
0 1 1 1 1 0 0 0 0 1
1 0 0 1 0 0 0 0 0 0
1 0 1 1 0 1 0 0 0 0
1 1 0 1 1 1 1 0 1 1
1 1 1 0 0 0 0 0 0 0

Based on the above truth table, we can derive Boolean functions (and
corresponding circuits) for each of the 7 areas. For example,
X0 = NOT (a AND b AND c)
X1 = (a’b’c’) OR (a’b’c) OR (a’bc’) OR (a’bc) OR (abc’)
……
Using K-maps, we can simplify X1 to ( a’ OR bc’ )

4. The function being implemented can be obtained by tracing the output lines in the
circuit. Doing this we get:
If you trace the signals through the gates, we get F = F1+ F2. Next get the Boolean
functions for F1 and F2.
F1= x.H1 (i.e., x AND H1), and F2= G1 XOR G2.
G1 = NOT (H1 XOR H2)
G2 = H2 NAND z
H1 = x XOR y
H2 = y.z (i.e., y AND z).
Now substitute for H1, H2, G1, G2, F1, F2 to get:
F = (x AND (x XOR y)) + ((NOT ( (x XOR y) XOR (yz)) XOR ( (yz) NAND z))

Alternately, start with the truth table for the circuit. We have three input variables, x,y,z
and one output F.

Alternately, start with the truth table for the circuit. We have three input variables, x,y,z
and one output F.

x y z F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

Based on the truth table (i.e., the rows that have Z=1), we can get a two level circuit by
providing an OR of min-terms.
F = x’yz’ + x’yz + xy’z’ + xy’z

Going a step further, we can draw the K-map and further simplify…

K-map y’z’ y’z yz yz’

For F
x’ 1 1
x 1 1
Using the K-map, we get F= x’y + xy’ = x XOR y

5. Create the Karnaugh maps and then simplify for the following function:
F(w,x,y,z) = w’x’y’z’ + w’x’y’z + w’x’yz’ + w’xyz’ + wx’y’z’ + wx’y’z + wx’yz’

The Karnaugh map for F2 (a 4-variable K-map) is:

For F2 y’z’ y’z yz yz’

w’x’ 1 1 1
w’x 1
wx
wx’ 1 1 1

From above we can get a simplified function: x’y’ + w’yz’ + x’yz’ (on the K-map, the
first term is indicated in red, the second in blue, and the third using underline).
6. What are the inputs to the “system”? These are the inputs (yes or no) from the experts.
There are four inputs A,B,C,D as follows:
 A: Pain Webster
 B: Meg A Cash
 C: Madame Trelawney
 D: Professor Lockhart
Each expert gives a 1 (yes) or 0 (No) as their input.
There is only one output from your system – decision to buy (with 1=Buy and 0 = do not
buy). Based on the description, on how you interpret their experts inputs, we get the
following truth table:

A B C D Buy
0 0 0 0 1
0 0 0 1 0
0 0 1 0 1
0 1 1 0 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0