TQP3M9009

High Linearity LNA Gain Block

Applications
• Repeaters
• Mobile Infrastructure
• LTE / WCDMA / EDGE / CDMA
• General Purpose Wireless
3-pin SOT- 89 Package

Product Features Functional Block Diagram

• 50 – 4000 MHz GND
• 21.8 dB Gain At 1.9 GHz 4
• +39.5 dBm Output IP3
• 1.3 dB Noise Figure At 1.9 GHz
• 50 Ohm Cascadable Gain Block
• Unconditionally Stable
• High input power capability
1 2 3
• +5V Single Supply, 125 mA Current
• SOT-89 Package RF IN GND RF OUT

General Description Pin Configuration

The TQP3M9009 is a cascadable, high linearity gain Pin No. Label
block amplifier in a low-cost surface-mount package. At 1 RF IN
1.9 GHz, the amplifier is targeted to provide 21.8 dB
2 GND
gain, +39.5 dBm OIP3, and 1.3 dB Noise Figure while
only drawing 125 mA current. The device is housed in a 3 RF OUT
leadfree/green/RoHS-compliant industry-standard SOT- Backside Paddle GND
89 package using a NiPdAu plating to eliminate the
possibility of tin whiskering.

The TQP3M9009 has the benefit of having high gain

across a broad range of frequencies while also providing
very low noise. This allows the device to be used in both
receiver and transmitter chains for high performance
systems. The amplifier is internally matched using a high
performance E-pHEMT process and only requires an
external RF choke and blocking/bypass capacitors for
operation from a single +5V supply. The internal active
bias circuit also enables stable operation over bias and Ordering Information
temperature variations.
Part No. Description
The TQP3M9009 covers the 0.05 – 4 GHz frequency TQP3M9009 High Linearity LNA Gain Block
band and is targeted for wireless infrastructure or other TQP3M9009-PCB_IF 0.05 – 0.5 GHz Evaluation Board
applications requiring high linearity and/or low noise TQP3M9009-PCB_RF 0.5 – 4 GHz Evaluation Board
figure.
Standard T/ R size = 1000 pieces on a 7” reel

Datasheet Rev. H 07-29-14 - 1 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Absolute Maximum Ratings Recommended Operating Conditions

Parameter Rating Parameter Min Typ Max Units
Storage Temperature −65 to +150 °C Device Voltage (VDD) +3.0 +5.0 +5.25 V
 °
RF Input Power, CW, 50 Ω, T=25 C +23 dBm TCASE -40 +85 °C
6
Device Voltage (VDD) +7 V Tj for >10 hours MTTF +190 °C
Reverse Device Voltage −0.3 V Electrical specifications are measured at specified test
conditions. Specifications are not guaranteed over all
Operation of this device outside the parameter ranges
recommended operating conditions.
given above may cause permanent damage.

Electrical Specifications
Test conditions unless otherwise noted: VDD=+5 V, Temp=+25 °C, 50 Ω system
Parameter Conditions Min Typ Max Units
Operational Frequency Range 50 4000 MHz
Test Frequency 1900 MHz
Gain 20 21.8 23 dB
Input Return Loss 13 dB
Output Return Loss 14 dB
Output P1dB +22 dBm
Output IP3 Pout=+3 dBm / tone, ∆f=1 MHz +36.5 +39.5 dBm
Noise Figure 1.3 dB
Current, IDD 125 150 mA
Thermal Resistance, θjc Junction to case 34 °C/W

Datasheet Rev. H 07-29-14 - 2 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

S-Parameters
Test Conditions: VDD=+5 V, IDD=125 mA, T=+25 °C, 50 Ω system, calibrated to device leads
Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang)
50 −16.66 −149.04 27.36 171.55 −29.65 1.22 −13.56 179.33
100 −14.86 −157.51 27.12 166.00 −29.37 −1.50 −13.09 174.97
200 −13.56 −165.34 26.70 156.36 −29.26 −5.67 −12.78 159.12
400 −12.51 −173.30 26.14 137.87 −29.42 −14.20 −13.06 133.47
600 −11.37 178.88 25.53 119.50 −29.63 −21.58 −13.69 110.30
800 −10.40 169.81 24.85 102.41 −30.03 −28.26 −14.46 86.04
1000 −9.76 160.89 24.16 86.01 −30.28 −35.35 −15.64 62.04
1200 −9.31 150.48 23.40 70.36 −30.96 −40.26 −16.58 37.31
1400 −8.84 139.39 22.82 55.48 −31.05 −46.78 −17.14 11.49
1600 −8.51 128.52 22.31 41.20 −31.76 −51.29 −17.34 −12.33
1800 −8.33 116.42 21.66 27.52 −2.00 −58.53 −17.04 −33.75
2000 −8.16 104.69 21.23 13.67 −32.50 −63.59 −16.80 −57.05
2200 −8.01 92.36 20.82 0.68 −33.07 −66.83 −16.28 −76.12
2400 −8.06 79.88 20.33 −13.12 −33.72 −72.40 −15.48 −95.17
2600 −8.13 66.42 20.02 −26.88 −34.02 −77.18 −14.43 −113.34
2800 −8.14 51.54 19.74 −41.54 −34.42 −81.16 −13.66 −128.34
3000 −8.00 35.02 19.52 −55.82 −35.18 −86.54 −12.61 −142.44
3200 −8.13 17.50 19.28 −71.00 −36.25 −88.92 −11.99 −157.55
3400 −7.86 −3.63 19.10 −87.06 −36.83 −94.66 −11.31 −167.91
3600 −7.65 −26.69 18.91 −103.86 −37.20 −96.43 −10.62 −179.13
3800 −7.20 −52.39 18.59 −121.75 −38.27 −102.65 −10.05 170.24
4000 −6.39 −79.22 18.17 −140.35 −39.25 −102.05 −9.83 159.78

Datasheet Rev. H 07-29-14 - 3 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

TQP3M9009-PCB_IF / RF Evaluation Board

J4 J3
J3 VDD

R1
0Ω
J4 GND
C3
R1

C3
Q1
L1

C1 C2 L1

C1 C2
J1 1 J2
3
Q1
RF RF
Input 2, Backside Paddle Output

Notes:
1. See PC Board Layout, page 8 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. R1 (0 Ω jumper) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.

Bill of Material  – TQP3M9009-PCB_IF / RF

TQP3M9009-PCB_IF TQP3M9009-PCB_RF
Reference Designation
50 – 500 MHz 500 – 4000 MHz
Q1 TQP3M9009 TQP3M9009
C1, C2 1000 pF 100 pF
C3 0.01 uF 0.01 uF
L1 330 nH 68 nH
D1 Do Not Place
R1 0 Ω

Performance can be optimized at frequency of interest by using recommended component values shown in the table below.

Reference Frequency (MHz)

Designation 500 2000 2500 3500
C1, C2 100 pF 22 pF 22 pF 22 pF
L1 82 nH 22 nH 18 nH 15 nH

Datasheet Rev. H 07-29-14 - 4 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Typical Performance  – TQP3M9009-PCB_RF
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Parameter Typical Value Units
Frequency 500 900 1900 2700 3500 4000 MHz
Gain 25.7 24.7 21.8 20 18.9 18 dB
Input Return Loss 12 12 13 13 8 6 dB
Output Return Loss 11 13 14 10 10 11.5 dB
Output P1dB +22.5 +21.8 +22 +21.6 +21.8 +20.7 dBm
(1)
OIP3  +41.4 +40.5 +39.5 +39 +37.9 +35.8 dBm
(2)
Noise figure  0.9 0.9 1.3 1.7 2.1 2.4 dB
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure values in the table above includes board losses. Approx. =0.1dB at 2 GHz.

Performance Plots − TQP3M9009-PCB_RF

Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.

Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency
30 0 0

+85°C
+25°C +85°C
25 -5 -5 +25°C
−20°C +85°C
−40°C −20°C
+25°C
|S22| (dB)
|S11| (dB)
Gain (dB)

−40°C
−20°C
20 -10 -10
−40°C

15 -15 -15

10 -20 -20
500 1000 1500 2000 2500 3000 3500 4000 500 1000 1500 2000 2500 3000 3500 4000 500 1000 1500 2000 2500 3000 3500 4000
Frequency (MHz) Frequency (MHz) Frequency (MHz)

Noise Figure vs. Frequency Output IP3 vs. Pout / Tone Output IP3 vs. Frequency
4 50 50
Freq = 1900 MHz Pout=+3 dBm/tone
1 MHz Tone Spacing 1 MHz Tone Spacing,

3 45 45
+85°C +85°C
+25°C
OIP3 (dBm)

OIP3 (dBm)

+85°C +25°C
NF (dB)

+25°C −40°C −40°C

2 40 40
−40°C

1 35 35

0 30 30
500 1000 1500 2000 2500 3000 3500 4000 0 2 4 6 8 10 12 500 1000 1500 2000 2500 3000 3500 4000
Frequency (MHz) Pout / Tone (dBm) Frequency (MHz)

P1dB vs. Frequency IDD vs. Temperature Output IP2 vs. Frequency
26 130 65
Pout = +3 dBm / Tone Temp.=+25°C
CW Signal
1 MHz Tone Spacing
+85°C
24 125 60
+25°C
−40°C
OIP2 (dBm)

22 120 55
P1dB (dB)

IDD (mA)

20 115 50

18 110 45

16 105 40
500 1000 1500 2000 2500 3000 3500 4000 -40 -15 10 35 60 85 0 500 1000 1500 2000 2500 3000 3500 4000
Frequency (MHz) Temperature (°C) Frequency (MHz)

Datasheet Rev. H 07-29-14 - 5 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Performance Plots − TQP3M9009-PCB_RF (contd.)

Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.

Output IP3 vs. VDD P1dB vs. VDD Noise Figure vs. VDD
45 30 3.0
Pout/tone = +3 dBm Temp.=+25°C Temp.=+25°C Temp.=+25°C
Tone Spacing = 1 MHz
2.5
40 25
2.0

P1dB (dBm)
OIP3 (dBm)

NF (dB)
1900 MHz
35 20 1.5 900 MHz
1900 MHz 1900 MHz
900 MHz 900 MHz
1.0
30 15
0.5

25 10 0.0
3 4 5 6 7 3 4 5 6 7 3 4 5 6 7
VDD (Volts) VDD (Volts) VDD (Volts)

IDD vs VDD
125
Temp.=+25°C

120
IDD (mA)

115

110

105
3 4 5 6 7
VDD (Volts)

Datasheet Rev. H 07-29-14 - 6 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Typical Performance − TQP3M9009-PCB_IF

Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Parameter Typical Value Units
Frequency 70 100 200 500 MHz
Gain 27 26.8 26.4 25.8 dB
Input Return Loss 12 13 13 13 dB
Output Return Loss 11 11 12 13 dB
Output P1dB +21.6 +21.9 +21.9 +22.2 dBm
(1)
OIP3  +37.6 +38.8 +39 +41.4 dBm
(2)
Noise figure  1.4 1.3 0.9 0.9 dB
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure values in the table above includes board losses. Approx. =0.1 dB at 2 GHz.

Performance Plots − TQP3M9009-PCB_IF

Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.

Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency
30 0 0

+85°C
+25°C +85°C
28 -5 -5
−20°C +25°C
+85°C
−40°C −20°C
+25°C
|S22| (dB)
|S11| (dB)
Gain (dB)

−40°C
−20°C
26 -10 -10
−40°C

24 -15 -15

22 -20 -20
0 100 200 300 400 500 0 100 200 300 400 500 0 100 200 300 400 500
Frequency (MHz) Frequency (MHz) Frequency (MHz)

Noise Figure vs. Frequency Output IP3 vs. Pout/Tone P1dB vs. Frequency
2.5 50 26
Pout=3 dBm/Tone
1 MHz Tone Spacing,
2.0 +85°C +85°C
45 24
+25°C +25°C
+85°C −40°C −40°C
OIP3 (dBm)

1.5
P1dB (dB)
NF (dB)

+25°C
−40°C 40 22
1.0

35 20
0.5

0.0 30 18
0 100 200 300 400 500 0 100 200 300 400 500 0 100 200 300 400 500
Frequency (MHz) Pout / Tone (dBm) Frequency (MHz)

Datasheet Rev. H 07-29-14 - 7 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Pin Configuration and Description

Backside Paddle - GND

1 2 3
RF IN GND RF OUT / VDD

Pin No. Label Description

1 RF IN RF input; matched to 50 ohms. External DC Block is required.
RF/DC ground. Use recommended via pattern to minimize inductance and
2, Backside Paddle GND
thermal resistance. See PCB Mounting Pattern for suggested footprint.
3 RF OUT / VDD RF output, matched to 50 ohms. External DC Block and bias voltage required.

Evaluation Board PCB Information

TriQuint PCB 1075825 Material and Stack-up

50 ohm line dimensions: width = .028”, spacing = .028”

Datasheet Rev. H 07-29-14 - 8 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Package Marking and Dimensions

Package Marking: -Y-
D
Part Identifier − 3M9009 D1 D1
D1

Assembly Code − YXXX 4

3M9009 E1 M
E -Z-
YXXX H

1 2 3 L

B 2X B1 C Alternate Backside Patterns - Reflow Compatible

e
-T- (Part may be supplied with either pattern)
3 PLACES
e1 0.10 (0.004) M T Z S Y S SYMBOL MIN TYP MAX SYMBOL MIN TYP MAX
A 1.40 1.50 1.60 E 2.29 2.50 2.60
(.055) (.059) (.063) (.090) (.098) (.102)
7° B .44 .50 .56 2.13 2.20 2.29
E1
(.017) (.020) (.022) (.084) (.087) (.090)
B1 .36 .42 .48 e 1.50 BSC
A (.014) (.0165) (.019) (.059)
C .35 .40 .44 e1 3.00 BSC
(.014) (.016) (.017) (.118)
D 4.40 4.50 4.60 H 3.94 4.10 4.25
(.173) (.177) (.181) (.155) (.161) (.167)
D1 1.62 1.73 1.83 L .89 1.10 1.20
(.064) (.068) (.072) (.035) (.043) (.047)
M 2.2 2.40 2.6
(.087) (.095) (.102)
Notes:
1. All dimensions are in millimeters. Angles are in degrees.
2. Dimension and tolerance formats conform to ASME Y14.4M-1994.
3. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012.
4. Contact plating: NiPdAu

PCB Mounting Pattern

Notes:
1. All dimensions are in millimeters. Angles are in degrees.
2. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135”) diameter
drill and have a final plated thru diameter of .25 mm (.010”).
3. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance.
4. RF trace width depends upon the PC board material and construction.
5. Use 1 oz. Copper minimum.

Datasheet Rev. H 07-29-14 - 9 of 10 - Disclaimer: Subject to change without notice

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 TQP3M9009
High Linearity LNA Gain Block

Product Compliance Information

ESD Sensitivity Ratings Solderability
Compatible with both lead-free (260°C maximum reflow
temperature) and tin/lead (245°C maximum reflow
Caution! ESD-Sensitive Device temperature) soldering processes.

Contact plating: NiPdAu

ESD Rating: Class 1A
Value: ≥ 250V to < 500 V RoHs Compliance
Test: Human Body Model (HBM) This part is compliant with EU 2002/95/EC RoHS
Standard: ESDA / JEDEC Standard JS-001-2012 directive (Restrictions on the Use of Certain Hazardous
Substances in Electrical and Electronic Equipment).
ESD Rating: Class C3
Value: Passes ≥ 1000 V This product also has the following attributes:
Test: Charged Device Model (CDM) • Lead Free
Standard: JEDEC Standard JESD22-C101F • Halogen Free (Chlorine, Bromine)
• Antimony Free
MSL Rating • TBBP-A (C15H12Br402) Free
MSL Rating: Level 3 • PFOS Free
Test: 260°C convection reflow • SVHC Free
Standard: JEDEC Standard IPC/JEDEC J-STD-020

Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and information
about TriQuint:

Web: www.triquint.com Tel: +1.503.615.9000

Email: info-sales@triquint.com Fax: +1.503.615.8902

For technical questions and application information:

Email: sjcapplications.engineering@triquint.com

Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information
contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained
herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The
information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with
such information is entirely with the user. All information contained herein is subject to change without notice.
Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The
information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any
patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or
anything described by such information.

TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-
sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal
injury or death.

Datasheet Rev. H 07-29-14 - 10 of 10 - Disclaimer: Subject to change without notice

© 2014 TriQuint www.triquint.com