Decoders

EXPERIMENT NO. 1: 2-LINE-TO-4-LINE DECODER

Objectives
The Objectives of this experiment:

1. To design a 2 × 4 decoder using basic gates

2. To understand the operation of 2 × 4 decoder.
3. To implement the Boolean function using 2 × 4 Decoder.

Equipment Required

 IC’s as required
 Logic Trainer
 Multimeter
 Cutter
 Single Core Wire
 Tweezer
 Pair of Pliers

Theory
Decoders are used to translate information from one form to another form. A decoder is a
combinational circuit that converts binary information from n-input lines to a maximum of 2n
unique output line. If the n-bit coded information has unused combinations, the decoder may
have fewer than 2n outputs. The decoder presented here are called n-to-m-line decoders,
where m < = 2n, their purpose is to generate the 2n (or fewer) min-terms of n input variables.
The name decoder is also used in conjunction with other code converters such as BCD-to-
seven-segment decoder.
2  4 line decoder has two input lines, four output lines and may or may not have enable
lines. For each possible input combination, there are three outputs that are equal to 0 and only
one that is equal to 1. The output whose value is 1 represents the minterm equivalent of the
binary number presently available in the input lines. Hence decoders are also called min-term
generators. As decoder can implement more than one function easily.

Diagram

2 inputs 4 Outputs
2 4 Decoder

Figure 8-1-1: The Block diagram of 2  4 Decoder

Logic Diagram

Draw the logic diagram of 2  4 Decoder

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Logic Trainer to 220V Ac power supply
3. Turn on the trainer and verify the voltage of the power supply using the multi-meter.
It should be exactly +5V.
4. Insert the required IC’s on the trainer’s breadboard.
5. Select the logic switches for the Inputs and mark them carefully.
6. Select the LED’s for output mark it carefully.
7. Connect Vcc (of all IC’s) to +5V available in the trainer.
8. Connect GND (of all IC’s) to ground available in the trainer.
9. Now turn on the power.
10. Proceed in a sequential order to complete the whole Functional Table given below.
11. Note down all outputs carefully.

Functional Table

Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.
 Inputs Outputs
I1 I0 D0 D1 D2 D3
0 0
0 1
1 0
1 1

Table 19-1: Function table for 2  4 Decoder.

In Case of Trouble

1. Check the power supply

2. Check the Vcc of all IC’s.
3. Check the GND of all IC’s.
4. Check all the wire connections.
5. Check the circuit wiring and remove all the breaks.
6. Check the IC using truth table

Conclusion

PRE LAB - EXPERIMENT NO. 1: 2-LINE-TO-4-LINE

DECODER
NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff.

Exercise
1. Add an enable line for 2  4 decoder. Write the name of enable line.
2. Draw the block diagram of 2  4 decoder. Mention all inputs, outputs and enable line
clearly.

3. Develop the Functional Table(Truth Table)

Enable Inputs Outputs

E I
I0 D0 D1 D2 D3
1
0 x x 0 0 0 0
0 0
0 1
1 0
1 1

4. Write the Boolean expression for the output.

D0 =

D1 =

D2 =

D3 =

5. Draw the logic diagram of 2  4 Decoder.

 6. Implement the Half Adder circuit using 2  4 Decoder

EXPERIMENT NO. 2: 3-LINE-TO-8-LINE DECODER

Objectives
The Objectives of this experiment:

1. To understand the operation of IC 74LS138 ( 3 × 8 Decoder )

2. To implement the Boolean function using IC 74LS138 ( 3 × 8 Decoder )
Equipment Required

 IC 74LS138
 Logic Trainer
 Multimeter
 Cutter
 Single Core Wire
 Tweezer
 Pair of Pliers

Theory

Decoders are used to translate information from one form to another form. A decoder is a
combinational circuit that converts binary information from n-input lines to a maximum of 2n
unique output line. If the n-bit coded information has unused combinations, the decoder may
have fewer than 2n outputs. The decoder presented here are called n-to-m-line decoders,
where m < = 2n, their purpose is to generate the 2n (or fewer) min-terms of n input variables.
The name decoder is also used in conjunction with other code converters such as BCD-to-
seven-segment decoder.
3  8 line decoder has three input lines, eight output lines and may or may not have enable
lines. For each possible input combination, there are seven outputs that are equal to 0 and
only one that is equal to 1. The output whose value is 1 represents the minterm equivalent of
the binary number presently available in the input lines. Hence decoders are also called min-
term generators. As decoder can implement more than one function easily.

Diagram

8 Outputs
3 inputs
3 8 Decoder

Figure 8-2-1: The Block diagram of 3  8 Decoder

Logic Diagram

Draw the logic diagram of 3  8 Decoder

Procedure

1. Use the pre- lab for Boolean expression and make the connections.
2. Connect the Digital Logic Trainer to 220V Ac power supply
3. Turn on the trainer and verify the voltage of the power supply using the multi-meter.
It should be exactly +5V.
4. Insert the required IC’s on the trainer’s breadboard.
5. Select the logic switches for the Inputs and mark them carefully.
6. Select the LED’s for output mark it carefully.
7. Connect Vcc (of all IC’s) to +5V available in the trainer.
8. Connect GND (of all IC’s) to ground available in the trainer.
9. Now turn on the power.
10. Proceed in a sequential order to complete the whole Functional Table given below.
11. Note down all outputs carefully.

Functional Table
Complete the table given below carefully by examining and carrying out the operations
mentioned in the theory.

Enable Inputs Outputs

E I D3 D4 D5 D6
I1 I0 D0 D1 D2 D7
2

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1

Table 8-2-1: Function table for 3  8 Decoder.

In Case of Trouble
 1. Check the power supply
2. Check the Vcc of all IC’s.
3. Check the GND of all IC’s.
4. Check all the wire connections.
5. Check the circuit wiring and remove all the breaks.
6. Check the IC using truth table

Conclusion
 PRE LAB - EXPERIMENT NO. 2: 3-LINE-TO-8-LINE
DECODER
NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff
Exercise

1. Draw the pin diagram of 3  8 decoder. Mention all inputs, outputs and enable line
clearly.

2. Develop the Functional Table(Truth Table)

Enable Inputs Outputs
G1 G2 G2B I2 I D3 D4 D5 D6
I1 D0 D1 D2 D7
A 0

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1

3. Write the Boolean expression for the outputs.

D0 =

D1 =

D2 =

D3 =

D4 =
 D5 =

D6 =

D7 =
4. Draw the logic diagram of 3  8 Decoder.

5. Implement 4 line to 16 line decoder using 2 line to 4 line decoder.

6. Design and Implement the Full Subtractor circuit using 3  8 Decoder
Seven Segment Decoder
EXPERIMENT NO. 1: BCD TO SEVEN SEGMENT DECODER
Objectives
The Objectives of this experiment:

1. To understand the operation of IC 7447 / IC 7448.

2. To understand the operation of Seven Segment display.
3. To develop a BCD to Seven Segment circuit.

Equipment Required

 IC 7447 / IC 7448
 Seven Segment Display
 Logic Trainer
 Multimeter
 Cutter
 Single Core Wire
 Tweezer
 Pair of Pliers

Theory

A seven-segment is used for displaying any one of the decimal digits 0 through 9. Usually the
decimal digit is available in BCD. A BCD to seven segment decoder accepts a decimal digit
in BCD and generate the corresponding seven-segment code.

The IC 7447 is a BCD to seven segment decoder/driver. It has four inputs for the BCD digit.
The 4-bit BCD digit is converted to a seven segment code with outputs a through g. The
outputs of the 7447 is applied to the inputs of seven segment display.

The seven segment display IC contains the seven LED (light emitting diode) segments on top
of the package. A 47 ohm resistor to Vcc is needed in order to supply the proper current to
the selected LED’s segments.
Different seven segment display may have different things. So it is mentioned to consult the
particular details of all the IC’s to be used.

Diagram

Figure 9-1-1: BCD to seven-segment decoder (7447) and seven-segment-display.

Figure 9-1-2: (a) Segment designation (b) Numeric designation for display.
 Table 9-1-1: Truth table for BCD to seven segment decoder

Procedure

1. Construct the circuit as shown in figure 21-1.

2. Connect the Digital Logic Trainer to 220V Ac power supply
3. Turn on the trainer and verify the voltage of the power supply using the multi-meter.
It should be exactly +5V.
4. Insert the required IC’s on the trainer’s breadboard.
5. Select the switches for the Inputs and mark them carefully. This will act as input BCD
digits.
6. Connect Vcc (of all IC’s) to +5V available in the trainer.
7. Connect GND (of all IC’s) to ground available in the trainer.
8. Now turn on the power.
9. Proceed in a sequential order to observe the decimal display.
10. Observe all outputs carefully.

NOTE

Inputs 1010 through 1111 have no meaning in BCD. Depending upon the decoder, these
values may cause either a blank or meaningless pattern or as mentioned in the data sheets.
Observe and record the output displayed patterns of the six unused input combinations.

In Case of Trouble

1. Check the power supply

2. Check the Vcc of all IC’s.
3. Check the GND of all IC’s.
 4. Check all the wire connections.
5. Check the circuit wiring and remove all the breaks.
6. Check the IC using truth table

Conclusion

PRE LAB - EXPERIMENT NO. 1: BCD TO SEVEN

SEGMENT DECODER
NOTE
Obtain data sheet of all the IC’s required in the Lab from Lab Staff

SECTION A: BCD TO SEVEN SEGMENT DECODER

Exercise

1. Draw the block diagram of a BCD to seven-segment-decoder. Mention all input lines
and output lines clearly.

2. Develop the Functional Table (Truth Table).

 BCD Inputs Outputs
A B C D a b c d e f g

3. Draw the Karnaugh Map and write Boolean expression for output a.

4. Draw the Karnaugh Map and write Boolean expression for output b.
5. Draw the Karnaugh Map and write Boolean expression for output c.

6. Draw the Karnaugh Map and write Boolean expression for output d.

7. Draw the Karnaugh Map and write Boolean expression for output e.
 8. Draw the Karnaugh Map and write Boolean expression for output f.

9. Draw the Karnaugh Map and write Boolean expression for output g.

10. Draw the logic diagram of BCD to seven segment decoder.

SECTION B: IC 7447
Exercise

1. Draw Pin Diagram for IC 7447 BCD to Seven Segment driver

7447 BCD to Seven Segment Driver

2. Draw diagram for Seven Segment Display

3. How many LED’s are there in seven segment display?

4. Write their names.

5. What do understand by the term common cathode type seven segment indicator?

6. How will you make connections of seven segment of common cathode type? Draw
the figure.
7. What do understand by the term common anode type seven segment indicator?

8. How will you make connections of seven segment of common anode type? Draw the
figure.