B.E EP 502 CBCS/Old-Sem - V Microprocessor and Microcontroller
B.E EP 502 CBCS/Old-Sem - V Microprocessor and Microcontroller
8. The cycle required to fetch and execute an instruction in a 8085 is which one of the following?
a. Clock cycle
b. Memory cycle
c. Machine cycle
d. Instruction cycle
Answer: Option d
17. Contents of opcode from memory are loaded into Instruction Register (IR) in this T-state:
a. T1 opcode fetch
b. T2 opcode fetch
c. T3 opcode fetch
d. T4 opcode fetch
Answer: Option c
19. Which one of the following is not addressing mode in 8085 microprocessor?
a. Immediate
b. Indirect
c. Register Indirect
d. Implicit
Answer: Option b
1. The instructions based on the stack operations are also known as 'zero address' or 'implied
instructions, because _______.
a. address gets updated automatically in stack pointer
b. processor can refer a memory stack without specifying the address
c. both a & b
d. none of the above
Answer: Option c
2. What is another name of memory stack especially given for the fundamental function performed by
it?
a. Last-in-first-out (LIFO)
b. First-in-last-out (FILO)
c. First-in-first-out (FIFO)
d. Last-in-last-out (LILO)
Answer: Option a
3. What does the last instruction of each subroutine that transfer the control to the instruction in the
calling program with temporary address storage called as?
a. jump to subroutine
b. branch to subroutine
c. return from subroutine
d. call subroutine
Answer: Option c
4. A sequence of two registers that multiplies the content of DE register pair by two and stores the
result in HL register pair (in 8085 assembly language) is
a. XCHG & DAD B
b. XTHL & DAD H
c. PCHL & DAD D
d. XCHG & DADH
Answer: Option d
6. If you wish to save the value of the accumulator on the stack, which of the following instruction
will you use?
a. PUSH PSW
b. PUSH A
c. POP PSW
d. PUSH SP
Answer: Option a
8. POP B is a
a. 1 byte instruction
b. 2 byte instruction
c. 3 byte instruction
d. 4 byte instruction
Answer: Option a
10. The content of the HL pair after the execution of the following instructions is ___.
XRA A
MOV L, A
MOV H, L
INX H
DAD H
a. 0000H
b. 0001H
c. 0011H
d. 0002H
Answer: Option d
11. To set a bit you can use ___ logic and to reset it you can use ___ logic.
a. NOT, AND
b. OR, AND
c. AND, OR
d. AND, NOT
Answer: Option b
12. To add two 32-bit numbers using an 8085, how many additions would you need to perform?
a. 2
b. 1
c. 8
d. 4
Answer: Option d
13. What type of instructions can potentially change the sequence of operations in a program?
a. Logical instructions
b. Data transfer instructions
c. Branch instructions
d. Arithmetic instructions
Answer: Option c
16. Which of the following 8085 instructions affect all flags except the CY flag?
a. ADC R
b. INR R
c. ACI data
d. SUI data
Answer: Option b
17. On the execution of PUSH/POP instruction, the contents of the SP are incremented/decremented
by
a. 8
b. 16
c. 2
d. 1
Answer: Option c
19. What will be the value in the memory location 7101H after the execution of the following code?
The data at memory location 7100 is A7H.
LXI H, 7100H
MOV A, M
CMA
INR A
STA 7101H
HLT
a. 59H
b. 58H
c. 5AH
d. none of these
Answer: Option a
20. What will be the value in the memory location 7101H after the execution of the following code?
The data at memory location 7100 is 35H.
LDA 7100H
ADD A
ADD A
STA 7101H
HLT
a. D4H
b. D3H
c. 4DH
d. 3DH
Answer: Option a
Unit 3: Memory Mapping & Interrupts of 8085
2. This is a type of interrupt where the external interrupting device supplies the address in addition to
the interrupt request.
a. Non-maskable interrupt
b. Non-vectored interrupt
c. Maskable interrupt
d. Polled interrupt
Answer: Option b
8. Which instruction set performs the dual operation of reading the status of interrupts as well as serial
input data bit?
a. RNZ
b. RZ
c. RPO
d. RIM
Answer: Option d
9. Which instruction is used to set the interrupt by maintaining the serial output bit in set mode of
operation?
a. SIM
b. STC
c. SBI Data
d. SUI Data
Answer: Option a
14. The input and output operations are respectively similar to the operations,
a. read, read
b. write, write
c. read, write
d. write, read
Answer: Option c
16. An 8085 microprocessor based system uses a 4kx8 bit RAM whose starting address is AA00H.
The address of last byte in this RAM is
a. 0FFF H
b. 1000 H
c. B9FF H
d. BA00 H
Answer: Option c
18. The maximum number of I\o devices can be interfaced with 8085 in the I/O mapped I/O technique
are
a. 128
b. 256
c. 64
d. 1024
Answer: Option b
19. The maximum number of I\o devices which can be interfaced in the memory mapped I\o
technique are
a. 256
b. 128
c. 65536
d. 32768
Answer: Option c
2. In which mode do all the Ports of the 8255 PPI work as Input-Output units for data transfer?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option b
3. Which of the following pins are responsible for handling the on the Read Write control logic unit of
the 8255 PPI?
a. CS'
b. RD'
c. WR'
d. all of the above
Answer: Option d
4. In which of the following modes is the 8255 PPI capable of transferring data while handshaking
with the interfaced device?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option c
5. How many bits of data can be transferred between the 8255 PPI and the interfaced device at a time?
a. 16 bits
b. 12 bits
c. 8 bits
d. None of the above
Answer: Option c
6. Which port of the 8255 PPI is capable of performing the handshaking function with the interfaced
devices?
a. Port A
b. Port B
c. Port C
d. All of the above
Answer: Option c
7. In which of the following modes of the 8255 PPI, only port C is taken into consideration?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option a
8. In mode 2 of I/O mode, which of the following ports are capable of transferring the data in both the
directions?
a. Port A
b. Port B
c. Port C
d. All of the above
Answer: Option a
9. In which of the following modes we do not consider the D6, D5 and D4 bits of the control word?
a. BSR mode
b. Mode 0 of I/O mode
c. Mode 1 of I/O mode
d. Mode 2 of I/O mode
Answer: Option a
10. How many data lines in total are there in the 8255 PPI IC?
a. 8 data lines
b. 32 data lines
c. 24 data lines
d. None of the above
Answer: Option c
11. The device that enables the microprocessor to read data from the external devices is
a. printer
b. Joystick
c. Display
d. Reader
Answer: Option b
13. The input and output operations are respectively similar to the operations,
a. read, read
b. write, write
c. read, write
d. write, read
Answer: Option c
19. A stepper motor having a resolution of 300 steps/rev and running at 2400 rpm has a pulse rate of-
pps.
a. 4000
b. 8000
c. 6000
d. 10,000
Answer: Option c
Unit 5: Microcontroller
3. When the microcontroller executes some arithmetic operations, then the flag bits of which register
are affected?
a. PSW
b. SP
c. DPTR
d. PC
Answer: Option a
4. How are the bits of the register PSW affected if we select Bank2 of 8051?
a. PSW.5=0 and PSW.4=1
b. PSW.2=0 and PSW.3=1
c. PSW.3=1 and PSW.4=1
d. PSW.3=0 and PSW.4=1
Answer: Option d
6. On power up, the 8051 uses which RAM locations for register R0- R7
a. 00-2F
b. 00-07
c. 00-7F
d. 00-0F
Answer: Option b
7. How many bytes of bit addressable memory is present in 8051 based microcontrollers?
a. 8 bytes
b. 32 bytes
c. 16 bytes
d. 128 bytes
Answer: Option c
19. What steps are followed when we need to turn on any timer?
a. load the count, start the timer, keep monitoring it, stop the timer
b. load the TMOD register, load the count, start the timer, keep monitoring it, stop the timer
c. load the TMOD register, start the timer, load the count, keep monitoring it, stop the timer
d. none of the mentioned
Answer: Option b