Electronics

Dr. Lana Damaj

Chapter 7

1
Chapter 6: Analog-to-Digital and Digital-to-Analog

• Sampling concept
• Shannon theorem
• Time to frequency domain analysis: Fourier Transform
• Quantization
• Analog to digital conversion
• Digital to Analog conversion

2 Electronics
 Introduction

• Digital signals themselves are simply two-state (binary) levels. These

levels may be represented in many ways.

• Decimal Whole Numbers One of the most common schemes for

encoding analog data into a digital word is to use the straight counting
of decimal (or base 10) and binary number representations.

• Octal and Hex Numbers: It has become common to use either the
octal (base 8) or hexadecimal (base 16, called hex) representations.

• Fractional Binary Numbers: It is possible to define a fractional binary

number in the same manner as whole numbers, using only the 1 and 0
of this counting system.

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 Introduction

• Boolean Algebra:
■ Let us consider a simple example of how a Boolean equation
may result from a practical problem

■ The alarm will be triggered when the Boolean variable D goes to

the logic true state. The alarm conditions are
■ 1. Low level with high pressure
■ 2. High level with high temperature
■ 3. High level with low temperature and high pressure

• We now define a Boolean expression with AND operations that will

give a D=1 for each condition:

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 Introduction

• Practical problem (cont.)

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 Analog Signals versus Digital Signals

• Analog signals:
• Continuous with time
• Noise sensitive
• Cannot be manipulated by the computer

• Digital signals:
• Discrete with time
• Generally free from noise
• Can be manipulated by the computer.
• Cannot exactly represent or reconstruct analog signals

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 Sampling
• The analog signal is converted to digital data at regular time
intervals and the digitized data are presented to the computer
• There are two processes involved in this conversion:
• Amplitude quantization
• Discrete-time sampling
• Quantizing the amplitude of continuous signal to digital data at
discrete times is referred to as sampling

Amplitude
Analog signal
quantization

Discrete time sampling

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 Sampling: Example
4 samples/s

• A 1 Hz sine wave is sampled at

three different rates, at 4, 8
and 16 samples/s 8 samples/s

• It is clear that the accuracy of

construction of original wave is
improved on increasing the
number of samples collected in
unit time, the sampling rate. 16 samples/s

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 Shannon sampling theorem
• The Shannon sampling theorem relates the sampling rate and the
maximum frequency component present in the signal to completely
recover the original signal from its sampled data without the loss of
information: fs>2fmax

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 Frequency Domain Signal Representation

• General description
• Aperiodic signal has Fourier transform
• Time domain: unrepeated ! Frequency domain: continuous
frequency components
• Periodic signal has Fourier series representation
• Time domain: repeated ! Frequency domain: discrete
frequency components
• Fourier transform and Fourier series both give
spectrum of the signal

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 Review: Fourier transform

• If g(t) is an aperiodic deterministic signal, then its Fourier

transform and inverse Fourier transform are
∞
⎧ g (t ) = G ( f )e j 2π ft df
⎪ ∫−∞
⎨ ∞ where j = −1.
− j 2π ft
⎪G ( f ) = ∫ g (t )e dt
⎩ −∞

• Define:
| G ( f ) |: magnitude spectrum of g (t )
ang{G ( f )}: phase spectrum of g (t )
•

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 Review: Fourier transform

• Fourier transform of cos(2πfct) is

1
FT {cos(2π f c t )} = [δ ( f − f c ) + δ ( f + f c ) ]
2

•
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 Review: Impulse (Dirac Delta) function

⎧⎪δ (t ) = 0, for t ≠ 0
⎨ ∞
⎪⎩ ∫−∞ δ (t )dt = 1

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 Frequency spectrum

• The frequency spectrum of the signals x(t), p(t) and xp(t) are
represented is the next slide

• X(f) is the frequency spectrum of x(t). The highest frequency of x(t)

is fH and at frequencies above fH, X(f) is zero.

• P(f) is the spectrum of p(t) which is also a train of pulses separated

by sampling frequencies fs .

• Xp(f) is the spectrum of xp(t) which is a repetitive pattern of X(f) in

intervals of fs

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 Frequency spectrum
• The frequency spectrum of the signals x(t), p(t) and xp(t)
• From the spectrum frequency, the sampling frequency fs should be
greater than 2fH

 condition fs − fH > fh or fs > 2fH

fs − fH
−fs + fH
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 Shannon theorem

• The conditions for recovering continuous time signal from its

sampled discrete time data are:

• The signal must be band-limited

• It should be sampled at a frequency greater than 2fH, where fH is
the highest frequency component in the signal

• Shannon sampling theorem: to be able to completely recover the

continuous signal from its samples, the sampling frequency must
be at least twice the highest frequency present in the signal

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 Analog-to-Digital Conversion

• Quantizing - breaking down analog value in a set of finite

states

• Encoding - assigning a digital word or number to each state

and matching it to the input signal

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 Step 1: Quantizing
Output States Discrete Voltage Ranges (V)

0 0.00-1.25

Example: 1 1.25-2.50
You have 0-10V signals.
2 2.50-3.75
Separate them into a set
of discrete states with 3 3.75-5.00
1.25V increments. (How
did we get 1.25V? See 4 5.00-6.25
next slide…)
5 6.25-7.50

6 7.50-8.75

7 8.75-10.0
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 Quantizing
• Example (cont.):

• The number of possible states that the converter

can output is:
N=2n
• where n is the number of bits in the AD converter

• Example: For a 3 bit A/D converter, N=23=8.

• Analog quantization size:

Q=(Vmax-Vmin)/N = (10V – 0V)/8 = 1.25V

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 Encoding
Output States Output Binary Equivalent

0 000
• Example (cont.): 1 001

• Here we assign 2 010

the digital value 3 011
(binary number) to 4 100
each state for the
computer to read. 5 101

6 110

7 111

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 Accuracy of A/D Conversion

There are two ways to best improve accuracy of A/D

conversion:

• Increasing the resolution (decreasing the analog

quantization size) which improves the accuracy in
measuring the amplitude of the analog signal.

• Increasing the sampling rate which increases the

maximum frequency that can be measured.

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 Resolution

• Resolution (number of discrete values the converter

can produce) = Analog Quantization size (Q)
(Q) = Vrange / 2n, where Vrange is the range of analog
voltages which can be represented

• limited by signal-to-noise ratio (should be around 6dB)

• In our previous example: Q = 1.25V, this is a high

resolution. A lower resolution would be if we used a 2-
bit converter, then the resolution would be 10/22 =
2.50V.

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 Sampling Rate

Frequency at which ADC evaluates analog signal. As we

see in the second picture, evaluating the signal more often
more accurately depicts the ADC signal.

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 Example

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 Analog to digital conversion

• The two principles must be observed in the ADC sampling process:

• Sampling must take place at a rate at least twice the highest

frequency component in the signal.

• If the frequency content of the signal is unknown, frequencies

above the largest frequency of interest should be filtered out.
The highest frequency of interest must be less than half the
sampling rate.

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 Analog-to-Digital Converter Types

• Converters

• Flash ADC
• Successive Approximation ADC

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 Flash ADC

• Consists of a series of comparators, each one comparing the

input signal to a reference voltage.
• Flash analog-to-digital converters, also known as parallel
ADCs.
• It is the fastest way to convert an analog signal to a digital
signal.
• Flash ADCs are suitable for applications requiring very large
bandwidths.
• However, these converters consume considerable power,
have relatively low resolution, and can be quite expensive.
This limits them to high-frequency applications .

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 Flash ADC Circuit
• Flash ADCs are made by cascading high-speed
comparators.
• For an N-bit converter, the circuit employs 2N -1
comparators.
• A resistive-divider with 2N resistors provides the
reference voltage.
• Each comparator produces a 1 when its analog
input voltage is higher than the reference voltage
applied to it. Otherwise, the comparator output is 0. 3R
V3 = Vref = 3V1
∑R
• Thus, if the analog input is between VX4 and VX5, 2R
comparators X1 through X4 produce 1s and the V2 = Vref = 2V1
∑R
remaining comparators produce 0s. The point R
where the code changes from ones to zeros is the V1 = V
∑ R ref
point at which the input signal becomes smaller
than the respective comparator reference-voltage
levels.

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 Flash ADC

• Advantages:

• Simplest in terms of operational theory

• Most efficient in terms of speed, very fast
• limited only in terms of comparator and gate propagation delays

• Disadvantages:

• Lower resolution
• Expensive
• For each additional output bit, the number of comparators is doubled
• i.e. for 8 bits, 256 comparators needed

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 Successive Approximation ADC
• A Successive Approximation Register (SAR) is added to the circuit
• Instead of counting up in binary sequence, this register counts by trying all
values of bits starting with the MSB (most significant bit) and finishing at the
LSB (least significant bit).
• The successive approximation Analog to digital converter circuit typically
consists of four chief subcircuits:
• A sample and hold circuit to acquire the input voltage (Vin).
• An analog voltage comparator that compares Vin to the output of the
internal DAC and outputs the result of the comparison to the successive
approximation register (SAR).
• A successive approximation register subcircuit designed to supply an approximate
digital code of Vin to the internal DAC.
• An internal reference DAC that, for comparison with V REF , supplies
the comparator with an analog voltage equal to the digital code output of the
SARin.
• The register monitors the comparators output to see if the binary count is
greater or less than the analog signal input and adjusts the bits accordingly

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 Successive Approximation ADC Circuit

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 Successive Approximation

• Advantages

• Medium accuracy compared to other ADC types

• Good tradeoff between speed and cost
• Capable of outputting the binary number in serial (one bit at
a time) format.

• Disadvantages

• Higher resolution, successive approximation ADC’s will be

slower
• Speed limited

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 Digital-to-Analog converters

• Both data in the physical world and control signals sent to interact
with the physical world are typically "analog" or continuously
varying quantities.

• In order to use the power of digital electronics, one must convert

from analog to digital form on the experimental measurement end
and convert from digital to analog form on the control or output end
of a laboratory system.

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 Data Collection and Control

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 Digital-to-Analog converters
• In an electronic circuit, a combination of high voltage (+5V)
and low voltage (0V) is usually used to represent a binary
number. For example, a binary number 1010 is represented by

Weighting 23 22 21 20

Binary Digit 1 0 1 0

State +5V 0V +5V 0V

DACs are electronic circuits that convert digital, (usually binary) signals (for example,
1000100) to analog electrical quantities (usually voltage) directly related to the digitally
encoded input number.

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 Digital-to-Analog converters
• DACs are used in many other applications, such as voice synthesizers,
automatic test system, and process control actuator. In addition, they allow
computers to communicate with the real (analog) world.

Input Binary
Number
Analog Voltage
Output
Resistive
Register

Summing Amplifier
Voltage Network
Switch

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 Digital-to-Analog converters

• Register: Use to store the digital input (let it remain a constant

value) during the conversion period.

• Voltage switch: Similar to an ON/OFF switch. It is ‘closed’ when

the input is ‘1’. It is ‘opened’ when the input is ‘0’.

• Resistive Summing Network: Summation of the voltages according

to different weighting.

• Amplifier: Amplification of the analog according to a pre-

determined output voltage range.

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 Digital-to-Analog Converter Types

• The two most popular types of resistive summing networks

are:

■ Weighted binary resistance type, and

 
■ Ladder resistance (R-2R) type

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 Weighted Sum DAC

• One way to achieve D/A conversion is to use a summing

amplifier.
• This approach is not satisfactory for a large number of bits
because it requires too much precision in the summing
resistors.
• This problem is overcome in the R-2R network DAC.

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 Binary Weighted Resistor

• Utilizes a summing op-amp circuit

• Weighted resistors are used to distinguish each bit from the
most significant bit (MSB) to the least significant one (LSB)
• Transistors are used to switch between Vref and ground (bit
high or low)

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 Binary Weighted Resistor

Vref

2R I Rf
• Assume Ideal Op-amp
4R
- Vout
• No current into op-amp
+
2nR
• Vout= -IRf

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 Binary Weighted Resistor
Vref
▪ Voltages V1 through Vn are either V1
R
Vref if corresponding bit is high or
ground if corresponding bit is low V2 2R I Rf

V3 4R
▪ V1 is most significant bit
- Vout
▪ Vn is least significant bit +
Vn 2n-1R

MSB

LSB
⎛ V1 V2 V3 Vn ⎞
Vout = − IRf = − Rf ⎜ + + + n -1 ⎟
⎝ R 2R 4R 2 R⎠
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 Binary Weighted Resistor

If Rf=R/2
⎛ V1 V2 V3 Vn ⎞
Vout = − IRf = −⎜ + + + n ⎟
⎝2 4 8 2 ⎠
For example, a 4-Bit converter yields

⎛ 1 1 1 1⎞
Vout = −Vref ⎜ b3 + b2 + b1 + b0 ⎟
⎝ 2 4 8 16 ⎠
Where b3 corresponds to Bit-3, b2 to Bit-2, etc.

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 Binary Weighted Resistor

• Advantages
• Simple Construction/Analysis
• Fast Conversion
• Disadvantages
• Requires large range of resistors (2000:1 for 12-bit
DAC) with necessary high precision for low
resistors
• Requires low switch resistances in transistors
• Can be expensive. Therefore, usually limited to 8-
bit resolution.

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 R-2R Ladder

Each bit corresponds

Vref to a switch:

If the bit is high,

the corresponding
switch is connected to
the inverting input of
the op-amp.

If the bit is low, the

corresponding switch
is connected to ground.
Bit: 0 0 0 0
Vout
4-Bit Converter

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 R-2R Ladder

V3
Vref V1 V2 V3
Ideal Op-amp

2R 2R

Req =
(2 R )(2 R )
=R
(2 R + 2 R )

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 R-2R Ladder

Vref V1 V2 V3 V2 V3

R R

⎛ R ⎞ 1
V3 = ⎜ ⎟V2 = V2
⎝ R+R⎠ 2
I
Likewise,
1
V2 = V1
Vout 2
1
V1 = Vref
2
Vout = − IR

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 R-2R Ladder

Results:
Vref V1 V2 V3 1 1 1
V3 = Vref , V2 = Vref , V1 = Vref
8 4 2

⎛ Vref Vref Vref Vref ⎞

Vout = − R⎜ b3 + b2 + b1 + b0 ⎟
⎝ 2R 4R 8R 16 R ⎠

Where b3 corresponds to bit 3,

b2 to bit 2, etc.
Vout
If bit n is set, bn=1

If bit n is clear, bn=0

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 R-2R Ladder

For a 4-Bit R-2R Ladder

⎛ 1 1 1 1⎞
Vout = −Vref ⎜ b3 + b2 + b1 + b0 ⎟
⎝ 2 4 8 16 ⎠
For general n-Bit R-2R Ladder or Binary Weighted Resister DAC

n
1
Vout = −Vref ∑ bn −i i
i =1 2
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 R-2R Ladder

• Advantages
• Only two resistor values (R and 2R)
• Does not require high precision resistors
• Disadvantage
• Lower conversion speed than binary weighted DAC

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 Some terms

• Dynamic range of the converter is defined as the ratio of the largest

resolvable signal to the smallest.
• Dynamic range=20log(2n)

• For an output binary code there is an uncertainity in defining the

exact analog input. For example, any input voltage between 6,875
V and 8,125 V to a 3-bit flash converter, in exercise 1, will output
binary code 110. this uncertainty is referred as quantization error or
quantization noise. Its value is between ±(resolution/2).

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 Successive Approximation Example
• 10 bit 1000000000
• Vin= 0.6 volts
• Vref=1volts
• Find the digital value of Vin
Vin=0.6V > Vout=Vref/2=0.5
b9=1

1100000000
Vin=0.6V < Vout=Vref/2+Vref/4=0.7
n
1 b8=0
V52out = −Vref ∑b n −i i Electronics
i =1 2
 Successive Approximation
n
1
Vout = −Vref ∑b n −i i
i =1 2
• MSB (bit 9)
• Divided Vref by 2
• Compare Vref /2 with Vin
• If Vin is greater than Vref /2 , turn MSB on (1)
• If Vin is less than Vref /2 , turn MSB off (0)
• Vin =0.6V and V=0.5
• Since Vin>V, MSB = 1 (on)

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 Successive Approximation

• Next Calculate MSB-1 (bit 8)

• Compare Vin=0.6 V to V=Vref/2 + Vref/4= 0.5+0.25 =0.75V
• Since 0.6<0.75, MSB is turned off
• Calculate MSB-2 (bit 7)
• Go back to the last voltage that caused it to be turned on
(Bit 9) and add it to Vref/8, and compare with Vin
• Compare Vin with (0.5+Vref/8)=0.625
• Since 0.6<0.625, MSB is turned off

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 Successive Approximation

• Calculate the state of MSB-3 (bit 6)

• Go to the last bit that caused it to be turned on (In this case
MSB-1) and add it to Vref/16, and compare it to Vin
• Compare Vin to V= 0.5 + Vref/16= 0.5625
• Since 0.6>0.5625, MSB-3=1 (turned on)

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 Successive Approximation

• This process continues for all the remaining bits.

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 V4 = 4.375V
Exercise 1
V7
V5 = 5.625V
• For the full range of analog
i n p u t o f 3 - b i t fl a s h V6 V6 = 6.875V
converter find comparator
and encoder outputs. The V5 V7 = 8.125V
range of operation is given
as 0-10 V.
V4

Vref R/2
V1 = = 0.625V V3
8R
Vref 3R/2 V2
V2 = = 1.875V
8R
V1
Vref 5R/2
V3 = = 3.125V
8R
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 Exercise 1: solution
• For the full range of analog input of 3-bit flash converter find
comparator and encoder outputs. The range of operation is given
as 0-10 V.

Vin Range C1 C2 C3 C4 C5 C6 C7 D0 D1 D2
0-0.625 0 0 0 0 0 0 0 0 0 0
0.625-1.875 1 0 0 0 0 0 0 0 0 1
1.875-3.125 1 1 0 0 0 0 0 0 1 0
3.125-4.375 1 1 1 0 0 0 0 0 1 1
4.375-5.625 1 1 1 1 0 0 0 1 0 0
5.625-6.875 1 1 1 1 1 0 0 1 0 1
6.875-8.125 1 1 1 1 1 1 0 1 1 0
8.125-10 1 1 1 1 1 1 1 1 1 1

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 Exercise 2
• Show the waveform of DAC output of a 3-bit successive
approximation ADC for an analog input of 6.5 V. the input range is
0-10 V Vref=10V

7.5
6.25
5

Electronics
 Exercise 2
• Show the waveform of DAC output of a 3-bit successive
approximation ADC for an analog input of 6,5 V. the input range is
0-10 V
1 0 Electronics
1 Workbench Models

b2 b1 b0 4bitDAC.ewb

Vref = 10V Vin = 6.5V

let b2=1 and b1=b0=0

Vref
Vin = 6.5V > Vout = =5
2
⟹ b2 = 1
b2=1 and let b1=1, b0=0
Vref Vref
Vin = 6.5V < Vout = + = 7.5
2 4
⟹ b1 = 0
Vref Vref
b2=1 and b1=0,let b0=1 Vin = 6.5V > Vout = + = 6.25V
2 8
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 Exercise 3
• 4-bit DAC has 5 V internal reference. Find outputs for all possible
inputs

input output input output

0000 0 1000
0001 0.3125 1001
0010 0.625 1010
0011 0.9375 1011
0100 1.25 1100
0101 1.5625 1101
0110 1110
0111 1111
n
1
Vout = −Vref ∑b n −i i
61 i =1 2 Electronics
 Exercise 4
• Find the current output of R-2R ladder network for a digital input of
1011. R=10 KΩ, Vs=10V

Vout = − RI
Vout = − Vref (1/2 + 1/8 + 1/16) = − 6.875V

I = 0.6875mA

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 Exercise 5
• A 12-bit SAR ADC outputs binary code 1111 1111 1111 for an analog input of
10 V. Find its resolution.

range 12
res = = 10/2
2N

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