Module - 2

8051 Instruction Set

ADDRESSING MODES OF 8051:

The CPU can access data in various ways, which are called addressing modes.

1. Immediate Addressing Mode:

 In this addressing mode, the data is given in the Instruction itself.

 The source operand is a constant
 The immediate data must be preceded by the pound sign, “#”
 Can load information into any registers, including 16-bit DPTR register
 DPTR can also be accessed as two 8-bit registers, the high byte DPH and low byte DPL.

EX:
MOV A, #25H ;load 25H into A
MOV R4, #62 ;load 62 into R4
MOV B, #40H ;load 40H into B
MOV DPTR, #4521H ;DPTR=4512H
MOV DPL, #21H ;This is the same
MOV DPH, #45H ;as above

; Illegal!! Value > 65535 (FFFFH)

MOV DPTR, #68975

2. Register Addressing Mode:

 Use registers to hold the data to be manipulated
 In this addressing mode, Data is given by a Register in the instruction.
 The permitted registers are A, R7 … R0 of each memory bank.
Ex:
The source and destination registers must match in size.
 MOV DPTR, A will give an error.
So following instructions can be used

Movement of data between Rr (r=0,1,….,7) registers is not allowed. i.e., MOV R4,R7 is invalid.

3. Direct Addressing Mode:

 Here, the address of the operand is given in the instruction.
 Only Internal RAM addresses (00H…7FH) and SFR addresses (from 80H to FFH) allowed.
 In contrast to immediate addressing mode, there is no “#” sign in the operand.
Ex:

MOV R0,40H ;save/move the content of RAM location 40H into R0

;
MOV 56H,A ;save/move content of A into RAM location 56H

The SFR (Special Function Register) can be accessed by their names or by their addresses

MOV 0E0H,#55H ;is the same as

MOV A,#55h ;load 55H into A

MOV 0F0H,R0 ;is the same as

MOV B,R0 ;copy R0 into B

 The register bank locations are accessed by the register names as well as by their RAM addresses.

 The SFR registers have addresses between 80H and FFH

 Not all the address space of 80 to FF is used by SFR
 The unused locations 80H to FFH are reserved and must not be used by the 8051
programmer.
4. Register-Indirect Addressing Mode:
 A register is used as a pointer to the data
• Only register R0 and R1 are used for this purpose
• R2 – R7 cannot be used to hold the address of an operand located in RAM
 When R0 and R1 hold the addresses of RAM locations, they must be preceded by the “@” Sign.
Example:

MOV A,@R0 ; move contents of RAM whose Address is held by R0 into A

MOV @R1,B ;move contents of B into RAM whose address is held by R1

 Internal RAM and External RAM can be accessed using this register indirect addressing mode.
 The advantage of giving an address using a register is that we can increment the address in a
loop, by simply incrementing the register, and hence access a series of locations.

Internal RAM is accessed by 8-bit addresses given by R0 Or R1 and external RAM can be accessed
using the following instructions.
5. Indexed Addressing Mode:

 This mode is used to access data from the Code memory (Internal ROM or External ROM).
 In this addressing mode, address is indirectly specified as a “SUM” of (A and DPTR) or (A and
PC).

 This is very useful because ROM contains permanent data which is stored in the form of Look Up
tables. To access a Look Up table, address is given as a SUM or two registers, where one acts as the
base and the other acts as the index within the table.
 A "C" is present in such instructions, to indicate Code Memory.

Figure below shows the instructions used in accessing external RAM and ROM memory
Example Program:
Write a program to copy the value 45H into RAM memory locations 40H to 41H using
(a) direct addressing mode, (b) register indirect addressing mode without a loop, and (c) with a loop
Solution:
(a)
MOV A,#45H ;load A with value 45H
MOV 40H,A ;copy A to RAM location 40H
MOV 41H,A ;copy A to RAM location 41H
(b)
MOV A,#45H ;load A with value 45H
MOV R0,#40H ;load the pointer. R0=40H
MOV @R0,A ;copy A to RAM R0 points to
INC R0 ;increment pointer. Now R0=41h
MOV @R0,A ;copy A to RAM R0 points to
(c)
MOV A,#45H ;A=45H
MOV R0,#40H ;load pointer.R0=40H,
MOV R2,#02 ;load counter, R2=3
AGAIN: MOV @R0,A ;copy 55 to RAM R0 points to
INC R0 ;increment R0 pointer
DJNZ R2,AGAIN ;loop until counter = zero
Data Transfer Instructions of 8051:
 MOV
 MOVX
 MOVC
 Exchange
 Exchange Digit
 PUSH
 POP

1. MOV :
Syntax: MOV DST,SRC

1. MOV A, #n
Example:
MOV A, #25H ;Register ‘A’ gets the 25H Immediate data.

2. MOV A, Rr |
Example:
MOV A, R0 ; Register ‘A’ gets the value of a RAM register.
;The value remains in the RAM register and is also copied into A ;register.

3. MOV A, addr |
Example:
MOV A, 25H ; Register ‘A’ gets the contents of the memory location whose
;address is 25H.

4. MOV A, @Rp |
Example:
MOV A, @R0

Operation:
Register ‘A’ gets the contents of the location pointed by the register R0.
If R0 = 20H and Location 20H contains value 35H, then 35H will be copied into to A
register.

All other possible instructions with MOV are listed below.

2. MOVX :
Used access external RAM memory.
3. MOVC: Used to access ROM memory

4. XCH: (Exchange)
5. XCHD: (Exchange Digit)
Arithmetic Instructions of 8051:
I. Addition of Unsigned numbers:
Instruction - ADD:

The instruction ADD is used to add two operands. The syntax of the ADD instruction is

ADD A, Source ; A = A + source

The destination operand is always in register A while the source operand can be a register, immediate data
or in memory (direct and indirect address).
ADD instruction can change any of the AF, CF, or PF bits of PSW register.
Following are list of possible add instructions.
 Example of Addition Program CY =1, since there is a
Show how the flag register is affected by the following instruction. carry out from D7.
MOV A,#0F5H ;A=F5 hex PF =1, because the
ADD A,#0BH ;A=F5+0B=00 number of 1s in
Solution: Accumulator is zero
F5H 1111 0101 (an even number),
+ 0BH + 0000 1011 PF is set to 1.
100H CY=1 0000 0000 AC =1, since there is a
carry from D3 to D4

ADDC and Addition of 16-Bit Numbers:When adding two 16-bit data operands, the propagation of a carry
from lower byte to higher byte is concerned. The instruction ADDC (Add with Carry) is used in such
occasions. Following are the instructions with different addressing modes.
 Example for ADDC
Write a program to add two 16-bit numbers. Place the sum in R4 and R5;
R4 should have the lower byte.
Solution:
CLR C ;make CY=0
MOV A, #0E7H ;load the low byte now A=E7H
ADD A, #8DH ;add the low byte
MOV R4, A ;save the low byte sum in R4
MOV A, #3CH ;load the higher byte
ADDC A, #3BH ;add with the carry
MOV R5, A ;save the higher byte
sum

II. Subtraction of Unsigned Numbers:

In many microprocessor there are two different instructions for subtraction: SUB and SUBB (subtract with
borrow). In the 8051 we have only SUBB. The 8051 uses adder circuitry to perform the subtraction.

Syntax:
SUBB A, SOURCE ; A = A – Source – CY

This instruction subtracts the source bye and carry flag from the accumulator and puts the result in
accumulator.
The destination operand is always in acummulator register A while the source operand can be a register,
immediate data or in memory (direct and indirect address). SUBB instruction can change any of the AF, CF,
OV and PF bits of PSW register.
To make SUB out of SUBB, we have to make CY=0 prior to the execution of the instruction.
Notice that we use the CY flag for the borrow.

Ex:
1. SUBB A, #25H ; A = A - 25H - CY
Operation:
Performs ‘A’ Register – Immediate data – CY Flag (Carry Flag holds the borrow of the previous
subtraction). Stores the result in A Register.
2. SUBB A, Rn ; A = A - Rn - CY (where, n=0,1,..,7)

Example: SUBB A,R0

Operation:
Performs ‘A’ Register – content of R0 – CY Flag (Carry Flag holds the borrow of the previous subtraction).
Stores the result in A Register.

3. SUBB A, addr

Example: SUBB A, 25H ; A = A - [25H] - CY

Operation:
Performs A Register – contents of memory address [25H] – Carry Flag (Carry Flag holds the borrow of the
previous subtraction). Stores the result in A Register

4. SUBB A, @Rp ; A = A - [Rp] - CY (where, p=0,1)

Example:
SUBB A, @R0 ; A = A - [R0] - CY
Operation:
Performs A Register – Contents of the memory location pointed by the register R0 – CY Flag.
Result is stored in A Register.

Example Program:
MOV A,#45H
CLR C
SUBB A,#23H ; A=45H-23H=22H

SUBB instruction is used for multi-byte numbers and will take care of the borrow of the lower operand.
Example program is given below,

Code to subtract 1296h from 2762h (2762H - 1296H).

CLR C
MOV A,#62H ;A=62H
SUBB A,#96H ;62H-96H=CCH with CY=1
MOV R7,A ;save the result
MOV A,#27H ;A=27H
SUBB A,#12H ;27H-12H-1=14H
MOV R6,A ;save the result
Solution:
We have 2762H - 1296H = 14CCH.

The result in the above example is positive number since the CY=0.
III. Multiplication of Unsigned Numbers:
 The 8051 supports byte by byte multiplication only.
 The byte are assumed to be unsigned data.

Syntax:
MUL AB ; A x B, 16-bit result in B, A

Unsigned multiplication summary:

Example program:

Code to multiply 25H and 65H.

MOV A,#25H ;load 25H to reg. A
MOV B,#65H ;load 65H to reg. B
MUL AB ;25H * 65H = E99 where
;B = OEH and A = 99H

IV. Division of Unsigned Numbers

 The 8051 supports byte over byte division only
 The byte are assumed to be unsigned data

Syntax:
DIV A B ;Divide A by B, A/B,
;Result, A = Quotient, B = Remainder

Unsigned division summary:

Example Program:

Code to Divide 95 by 10.

MOV A,#95 ;load 95 to reg. A
MOV B,#10 ;load 10 to reg. B
DIV AB ;B=05(Rem)and A=09(Quo)
V. Increment:

Syntax:

VI. Decrement:

Syntax:
BCD Number System:

The binary representation of the digits 0 to 9 is called BCD (Binary Coded Decimal).
Unpacked BCD:
In unpacked BCD, the lower 4 bits of the number represent the BCD number, and the rest of the bits are 0
Ex. 00001001 and 00000101 are unpacked BCD for 9 and 5
Packed BCD:
In packed BCD, a single byte has two BCD number in it, one in the lower 4 bits, and one in the upper 4 bits
Ex. 0101 1001 is packed BCD for 59H.

Table showing BCD numbers:

Digit BCD
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

Adding two BCD numbers must give a BCD result.

 DA Instruction
 DA A ;decimal adjust for addition
 The DA instruction is provided to correct the above mentioned problem associated with BCD
addition
 The DA instruction will add 6 to the lower nibble or higher nibble if need
 The “DA” instruction works only on A.
 In other word, while the source can be an operand of any addressing mode, the destination must
be in register A in order for DA to work.

Summary of DA instruction:
After an ADD or ADDC instruction
 If the lower nibble (4 bits) is greater than 9, or if AC=1, add 0110 to the lower 4 bits
 If the upper nibble is greater than 9, or if CY=1, add 0110 to the upper 4 bits

 Logical instructions 0f 8051:

1. AND:

ANL destination, source ; dest = dest AND source

 This instruction will perform a logic AND on the two operands and place the result in the
destination
• The destination is normally the accumulator
• The source operand can be a register, in memory, or immediate data.

MOV A,#35H ;A = 35H

ANL A,#0FH ;A = A AND 0FH

35H 00110101 ANL is often used to

0FH 00001111 mask (set to 0) certain
0FH 00000101 bits of an operand
2. OR:
ORL destination, source ; dest = dest OR source

 This instruction will perform a logic OR on the two operands and place the result in the
destination
• The destination is normally the accumulator
• The source operand can be a register, in memory, or immediate data.

MOV A,#04H ;A = 04H

ORL A,#68H ;A = A OR 68H=6CH

04H 00000100 ORL instruction can be

68H 0 1101000 used to set certain bits of
6CH 0 1101100 an operand to 1

3. XOR:

XRL destination, source ; dest = dest XOR source

 This instruction will perform a logic XOR on the two operands and place the result in the
destination
• The destination is normally the accumulator
• The source operand can be a register, in memory, or immediate

The XRL instruction can be used to clear the contents of a register by XORing it with
itself.
Show how XRL A, A clears A, assuming that A = 45H.
45H 0100 0101
45H 0100 0101
00H 0000 0000
4. Complement:

CPL A
complements the register A. This is called 1’s complement. Source and destination both will be the
accumulator. Content of A will 1’s complemented and stored back in A itself.

MOV A, #56H
CPL A ;now A=A9H
;0101 0110(56H)
;becomes 1010 1001(A9H)

 To get the 2’s complement, all we have to do is to add 1 to the 1’s complement

 Rotate Instructions:

RR A ; rotate right A
In rotate right
 The 8 bits of the accumulator are rotated right one bit position, and
 Bit D0 exits from the LSB and enters into MSB, D7

MOV A,#36H ;A = 0011 0110

RR A ;A = 0001 1011 = 1Bh
RR A ;A = 1000 1101 = 8Dh
RR A ;A = 1100 0110 = C6h
RR A ;A = 0110 0011 = 63h

RL A ; rotate left A
In rotate left
 The 8 bits of the accumulator are rotated left one bit position, and
 Bit D7 exits from the MSB and enters into LSB, D0

MOV A,#72H ;A = 0111 0010

RL A ;A = 1110 0100
RL A ;A = 1100 1001

RRC A ; rotate right A, through carry

 Bits are rotated from left to right
 They exit the LSB to the carry flag, and the carry flag enters the MSB

CLR C ;make CY = 0
MOV A,#26H;A = 0010 0110
RRC A ;A = 0001 0011 CY = 0
RRC A ;A = 0000 1001 CY = 1
RRC A ;A = 1000 0100 CY = 1
RLC A ; rotate left A, through carry
 Bits are rotated from left to right
 They exit the MSB to the carry flag, and the carry flag enters the LSB

Example 2- 14
Write a program that finds the number of 1s in a given byte.
MOV R1,#0
MOV R7,#8 ;count=08
MOV A,#97H
AGAIN: RLC A
JNC NEXT ;check for CY
INC R1 ;if CY=1 add to count
NEXT: DJNZ R7,AGAIN

 SWAP A
It swaps the lower nibble and the higher nibble
 In other words, the lower 4 bits are put into the higher 4 bits and the higher 4 bits are put into
the lower 4 bits
 SWAP works only on the accumulator (A)

Example 2- 15
(a) Find the contents of register A in the following code.
(b) In the absence of a SWAP instruction, how would you exchange the nibbles?
Write a simple program to show the process.
Solution:
(a)
MOV A,#72H ;A = 72H
SWAP A ;A = 27H
(b)
MOV A,#72H ;A = 0111 0010
RL A ;A = 1110 0100
RL A ;A = 1100 1001
RL A ;A = 1001 0011
RL A ;A = 0010 0111
 CJNE destination, source, Label
 The actions of comparing and jumping are combined into a single instruction called CJNE
 (compare and jump if not equal)
 The CJNE instruction compares two operands, and jumps if they are not equal.
 The destination operand can be in the accumulator or in one of the Rn registers.The source operand
can be in a register, in memory, or immediate data. The operands themselves remain unchanged
after execution.
 It changes the CY flag as shown in in below table, to indicate if the destination operand is larger or
smaller.

Write code to determine if register A contains the value 99H. If so make R1 = FFH
otherwise, make Rl = 00H.
Solution:
CJNE A, #99H, NEXT ; if A!=99H, then jump to label NEXT
MOV R1,#0FFH ;Load R1=FFH
NEXT: MOV R1,#00H ; Load R1=00H

Following instructions shows how the how CJNE works.

CJNE R5,#80H, NOT_EQUAL ; Check R5 = 80H, if not equal jump to label ‘NOT-EQUAL’
….…… ; If R5 = 80H execute immediate next instruction
NOT_EQUAL: JNC DOWN ; Jump if CY=0 to label ‘DOWN’ (if R5 >= 80 then CY=0)
….…. ; R5 < 80
DOWN: .…..

 Notice in the CJNE instruction that any Rn register can be compared with an immediate value
 There is no need for register A to be involved.
 The compare instruction is really a subtraction, except that the operands remain unchanged
 Flags are changed according to the execution of the SUBB instruction.
Types of CJNE Instructions are,
Branch instructions:
 Repeating a sequence of instructions a certain number of times is called a loop.
 Loop action is performed by instruction, DJNZ reg, Label, DJNZ addr, Label
• The register is decremented by one value
• If it is not zero, then it jumps to the target address referred to by the label
• Prior to the start of loop the register is loaded with the count value for the number of
repetitions
• Counter can be R0 – R7 or RAM location
Example for DJNZ reg, Label:
DJNZ R7, Back ; Decrement R7 and if not equal to “0”, go to label “Back”

Example for DJNZ addr, Label:

DJNZ 25H, Back ; Decrement the contents of location 25H, and if not equal to “0”, go to label “Back”

Branch instructions – Nested loop

If we want to repeat an action more times than 256, we use a loop inside a loop, which is called
nested loop.We use multiple registers to hold the count.

Example Program:
Write a program to
a. load the accumulator with the value 55H, and
b. complement the ACC 900 times

MOV A,#55H ;A=55H

MOV R3,#10 ;R3=10, outer loop count
NEXT: MOV R2,#90 ;R2=90, inner loop count
AGAIN: CPL A ;complement A register
DJNZ R2,AGAIN ;repeat AGAIN loop 90 times
DJNZ R3,NEXT ;repeat next loop 10 times
CONDITIONAL JUMPS:
A conditional jump instruction can have two possible executions, depending upon the
condition.
If condition is true, program will jump to the branch location, specified by the label.
If condition is false, program will simply proceed to the next instruction.
All conditional jumps are SHORT type of jumps.

1. JZ label ; jump if A=0

Example:
JZ NEXT ; If A register is “Zero”, jump to label “NEXT”

Determine if R5 contains the value 0. If so, put 00H in it else put FFH.

MOV A, R5 ; Load the contents of R5 to A

JZ NEXT ;if A = 00H jump to the label ‘NEXT’
MOV R5,#0FFH ;R5=FFH
SJMP SKIP
NEXT:MOV R5,#00H ;R5=00H
SKIP: SJMP $
END

2. JNZ label ; jump if A is not equal to “0”

Example:
JNZ Down ; If A register is “Not Zero”, jump to location “Down”

3. JNC label ; jump to label if carry flag is zero , CY=0

 If CY = 0, the CPU starts to fetch and execute instruction from the
address of the label
 If CY = 1, it will not jump but will execute the next instruction below
JNC

Example:
JNC Down ; If Carry flag is “0”, jump to label “Down”

4. JC label ; jump to label if carry flag is set, CY=1

 If CY = 1, the CPU starts to fetch and execute instruction from the
address of the label
 If CY = 0, it will not jump but will execute the next instruction below JNC
 Example:
JC Down ; If Carry flag is “1”, jump to label “Down”

Example Program:
Determine if the given number 09H is even or odd. If even, put 00H , else put FFH in R5
register.

MOV A, #09H ; Load the contents of 09H to A

RRC A ;Rotate right Accumulator through Carry
JNC NEXT ;if CY = 0 jump to the label ‘NEXT’
MOV R5,#0FFH ;R5=FFH, given Number is ODD
SJMP SKIP
NEXT:MOV R5,#00H ;R5=00H, given Number is EVEN
SKIP: SJMP $
END

5. JB bit, Label ; Jump if bit is set to label.

Here bit is, an address of a single bit or location of a bit in bit addressable area of
RAM or bit of a Special function registers SFR’s.
Example:
JB 30H, NEXT ; if bit at 30H is Set , jump to label “NEXT” (Here 30H
;is bit address in bit addressable area of RAM )
JB P0.0, DOWN ; If P0.0 = “1”, jump to location “DOWN”

6. JNB bit, Label ; Jump if bit is Zero (means not set) to label.
Here bit is, an address of a single bit in bit addressable RAM or a bit of a Special
function registers.
Example:
JNB 30H, NEXT ; if bit at 30H is zero , jump to label “NEXT” (Here
;30H is bit address in bit addressable area of RAM )
JNB P1.0, DOWN ; If P1.0 = “0”, jump to location “DOWN”

7. JBC bit, radd ; “Jump if Bit and complement/ clear”

Example:
JBC 30H, NEXT ; if bit 30H is set , jump to label “NEXT” and clear bit
;at 30H
 JBC P0.0, Down ; If P0.0 = “1”, jump to location “Down” and make
;P0.0 “0”

Unconditional Jumps:
 The unconditional jump is a jump in which control is transferred
unconditionally to the target location.
 Unconditional jumps do not test any bit or byte to determine whether the jump
should be taken.

 LJMP (long jump)

 Syntax: LJMP ladd ;Long Jump using the long (full) 16 bit address
 3-byte instruction
 First byte is the opcode
 Second and third bytes represent the 16-bit target address (Any memory
location from 0000 to FFFFH)

 SJMP (short jump)

 Syntax: SJMP radd ; Short Jump to label using the relative address
 2-byte instruction
 First byte is the opcode
 Second byte is the relative target address
 00 to FFh (forward +127 and backward -128 bytes from the current PC)

Calculating Short Jump Address

 To calculate the target address of a short jump (SJMP, JNC, JZ, DJNZ,
etc.)
 The second byte is added to the PC of the instruction immediately below
the jump
 If the target address is more than -128 to +127 bytes from the address
below the short jump instruction
 The assembler will generate an error stating the jump is out of range
 Code above shows the how SJMP works.

 AJMP (Absolute Jump):

 Syntax: AJMP sadd ;Absolute Jump using the short address
 Range: max 2KB as long as the Jump is within the Same Page
 Size of instruction: 2 Bytes (Opcode of AJMP= 1Byte, sadd = 1Byte)
 Here the entire program memory (64 KB), is divided into 32 pages, each
page being of 2KB. We can jump to any location of the same page, giving a
max range of 2 KB.
Bit Manipulation Instructions:
Bit manipulation instructions will check the conditions of the bit and if condition is
true, it jumps to the address specified in the instruction. Instructions that are used for
signal-bit operations are,
Instruction Function
SETB bit Set the bit (bit = 1)
CLR bit Clear the bit (bit = 0)
CPL bit Complement the bit (bit = NOT bit)
JB bit, target Jump to target if bit = 1 (jump if bit)
JNB bit, target Jump to target if bit = 0 (jump if no bit)
JBC bit, target Jump to target if bit = 1, clear bit (jump if bit, then clear)

Note: Here bit is an address of a single bit in bit addressable area of RAM or bit of a Special function
registers SFR’s.
Examples:
SETB P1.0 ; Set the port bit P1.0=1.
CLR PSW.7 ;MSB bit of PSW register is cleared to zero (same as CLR C)
CPL ACC.1 ;Complement the bit position 1 in Accumulator,
;Suppose if A=02H after CPL ACC.1 , A = 00H

Single bit Opeartions with Carry (CY):

There are several instructions by which the CY flag can be manipulated directly.

Table showing Carry Bit-Related Instructions.

Example Programs:
Write an assembly level program to realize function Y=A'B+C and store the result
obtained in carry flag. Assume that bit A is present at 30H, bit B is present at 40H and
bit C is present at 50H. (8 Marks)
Note: 30H, 40H ,50H are bit addressees of bit locations.

MOV C,40H ; Copy the bit B present at location 40H into CY flag
ANL C, 30H ; “CY” ANDed with bit at location “30H” and store the
;result in CY (Here ‘CY = B’ and bit at 30H is ‘A’)
ORL C,50H ; “CY” ORed with bit at “50H” (Here bit C is present at bit
;address 50H)