Microprocessor Lecture3
Microprocessor Lecture3
ADD instruction
mnemonic operands
Ex:
MOV AL,24H ;move 24H into AL
MOV DL,11H ;move 11H into DL
ADD AL,DL ;AL=AL+DL (AL=35H) (DL =11H)
¾ If one register data is followed by an immediate data, it is called the immediate operand.
MOV CH,24H
ADD CH,11H
¾ 8-bit registers can hold FFH (255) maximum. Addition of larger numbers can be performed by
the 16-bit nonsegment registers.
MOV AX,34EH
MOV DX,6A5H
ADD DX,AX ;DX=DX+AX (DX=9F3H)
MOV CX,34EH
ADD CX,6A5H ;CX=34EH+6A5=9F3H
Segment:
¾ A segment is an area of memory that includes up to 64K bytes and begins an address evenly
divisible by 16 (such an address ends in 0H).
¾ Assembly Language Program consists of three segments:
• code segment : contains the program code (instructions)
• data segment : used to store data (information) to be processed by the program
• stack segment: used to store information temporarily.
Logical and Physical Address
¾ Physical Address is the 20-bit address that actually put on the address bus. (in 8086)
• Has a range of 00000H - FFFFFH
¾ Offset Address is a location within 64K byte segment range.
• Has a range of 0000H - FFFFH
¾ Logical Address consists of segment address and offset address.
CS IP
2 5 0 0 : 9 5 F 3
Logical Address: CS:IP
Offset address
• Physical Address is generated by shifting the CS one hex digit to the left and adding IP.
The microprocessor will retrieve the instruction in turn memory locations starting from
2E5F3.
¾ The area of memory allocated strictly for data is called data segment.
¾ Just as the code segment is associated with CS and IP as segment register and offset. The data
segment uses DS and an offset value. In 8086 BX, SI and DI are used to hold the offset address.
Other way: Assume that the offset for data segment begins at 200H
DS:0200 = 25
DS:0201 = 12
DS:0202 = 15 within data segment
DS:0203 = 1F
DS:0204 = 2B
In such a case the low byte goes to the low memory location and high byte goes to the high
memory location.
DS:1500 = F3 DS:1501 = 35
This convention is called little endian convention: This convention is used by Intel. The big endian
convention is the opposite, where the high byte goes to the low address and low byte goes to the
high address. Motorolla microprocessor uses this convention.