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ch3 Computer Architecture

This document provides an overview of computer organization and architecture. It discusses the basic components of a computer like the control unit and bus. It also describes the attributes visible to a programmer like instruction set. The document then explains instruction codes, addressing modes, instruction formats, types of instructions and registers used in a basic computer like the accumulator, program counter, and data register. It concludes by describing the instruction cycle, input/output devices, and interrupts in a computer system.

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Mahesh Basnet
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0% found this document useful (0 votes)
43 views

ch3 Computer Architecture

This document provides an overview of computer organization and architecture. It discusses the basic components of a computer like the control unit and bus. It also describes the attributes visible to a programmer like instruction set. The document then explains instruction codes, addressing modes, instruction formats, types of instructions and registers used in a basic computer like the accumulator, program counter, and data register. It concludes by describing the instruction cycle, input/output devices, and interrupts in a computer system.

Uploaded by

Mahesh Basnet
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer Architecture

Er. Hari K.C.


Asst. Professor
Soch College of IT
Tribhuvan University
harikc@wrc.edu.np

Soch college of IT - Hari K.C. 1


Chapter 03: Basic computer Organization
Computer organization and architecture
Computer organization:
• It refer to the different components of computer and their
interconnection.
• The attributes of computer organization are: control unit, bus,
processor etc
Computer architecture:
• It refer to the attributes that are visible to the programmer.
• It includes attributes such as instruction set , opcode, instruction
format , addressing modes etc
Instruction Codes
• Instructions are encoded as binary instruction codes. A computer
instruction is often divided into two parts:
• An opcode (Operation Code) that specifies the operation for that
instruction
• An address that specifies the registers and/or locations in memory to use
for that operation.
• In the basic computer, since the memory contains 4096 (= 2^12) words, we
needs 12 bit to specify which memory address this instruction will use.
• In the basic computer, bit 15 of the instruction specifies the addressing
mode (0: direct addressing, 1: indirect addressing).
• Since the memory words, and hence the instructions, are 16 bits long, that
leaves 3 bits for the instruction’s opcode.
Addressing modes:
It is the technique of specifying the operands for instruction.
The advantages of addressing mode are: flexible for programmers,
provide large address space.

Types of addressing modes:


Direct AM: Instruction code contains address of operand.
- 1 memory-references after fetching instruction. opcode Direct Address

Immediate AM: Instruction code contains operand


- No memory-reference after fetching instruction opcode Operand(data)

Indirect AM: Instruction code contains address of operand


- 2 memory-references after fetching instruction. opcode Indirect Address
Instruction formats
• All Basic Computer instruction codes are 16 bits wide.
• There are 3 instruction code formats:
1) Memory-Reference Instructions:
- take a single memory address as an operand, and have the format:
2) Register-Reference Instructions:
- operate solely on the AC register, and have the following format:

3) Input/Output Instructions:
- for input output operations
Instruction Types
1) Functional instructions
- Arithmetic, logic, and shift instructions
- ADD, CMA, INC, CIR, CIL, AND
2) Transfer instructions
- Data transfers between the main memory and the processor registers
- LDA, STA
3) Control instructions
- Program sequencing and control
- JMP, JNZ, JC
4) Input and output instructions
- Input and output operations
- INP, OUT
Computer Registers
• Register are used to quickly accept, store, and transfer data and
instructions that are being used immediately by the CPU, there are
various types of registers those are used for various purpose.
• Among of the some mostly used registers named as Accumulator,
Data Register, Address Register, Program Counter, Memory Data
Register, Index register, Memory Buffer Register.
Types of registers
Instruction Register (IR)
• Instruction Register (16 bits) holds the instruction code of the instruction currently executing.
• Outputs of this register are hardwired to specific logic in the control unit, which interprets the bits to
generate control signals.
Address Register (AR)
• Address Register (12 bits) is used to interface with the memory unit. All memory-references are
• initiated by loading the memory address into AR.
Temporary Register (TR)
• Temporary Register (16 bits) is an extra register for storing data or addresses.
Input and Output Registers
• The Basic Computer has one input device and one output device. The Input Register (INPR) holds an
• 8 bit character gotten from an input device.
• The Output Register (OUTR) holds an 8 bit character to be send to an output device.
Program Counter (PC)
• The program counter (PC) is commonly called the instruction pointer (IP) in
Intel x86
• microprocessors, and sometimes called the Instruction Address Register
(IAR), or just part of the instruction sequencer in some computers, is a
processor register.
• Program Counter (12 bits) holds memory address of current/next
instruction to be executed.
• Updated as part of the instruction cycle. Usually incremented, but may be
parallel loaded by jump/branch instructions.
• It keeps track of the next memory address of the instruction that is to be
executed once the execution of the current instruction is completed.
In other words, it holds the address of the memory location of the next
instruction when the current instruction is executed by the microprocessor.
Accumulator Register (AC)
• This Register is used for storing the Results those are produced by the
System. When the CPU will generate Some Results after the
Processing then all the Results will be Stored into the AC Register.
• Accumulator (16 bits) is used for all mathematical, logic, and shift
operations except incrementing and clearing other registers (most
have built-in increment and clear capability).
• It is the destination for all ALU operations, and a source for all dyadic
(two-operand) operations.
Data Register (DR)
• A register used in microcomputers to temporarily store data being
transmitted to or from a
• peripheral device. Data Register (16 bits) is used to contain a second
operand for dyadic operations such as Add, Sub, AND, OR.
Instruction cycle
• The CPU performs a sequence of micro-operations for each instruction.
• The sequence for each instruction of the Basic Computer can be refined
into 4 abstract phases:
1) Fetch an instruction from memory
2) Decode the instruction
3) Read the effective address from memory if the instruction has an indirect
address
4) Execute the instruction
After an instruction is executed, the cycle starts again at step 1, for the next
instruction.
Instruction Fetch and Decode
• Program execution begins with: PC ← address of first instruction, SC ← 0
• After this, the SC is incremented at each clock cycle until an instruction is
completed, and then it is cleared to begin the next instruction.
• This process repeats until a HLT instruction is executed, or until the power
is shut off.
• Everything that happens in this phase is driven entirely by timing variables
T0, T1 and T2.
• Hence, all control inputs in the CPU during fetch and decode are functions
of these three variables alone.
Determining the Instruction Type
Memory-Reference Instructions
• Each memory ref instruction is indicated by a unique Di signal.
1) AND operation

2) ADD operation

3) Load operation (LDA)

4) Store operation(STA)
5) Branch unconditionally (BUN)

6) Branch and save return address (BSA)

7) Increment and skip if zero (ISZ)


Input-output and Interrupt operation
Input and Output devices
• The Basic Computer I/O consists of a simple terminal with a keyboard
and a printer/monitor.
• The terminal sends and receives serial information
• The serial information from the keyboard is shifted into INPR
• The serial information for the printer is stored in the OUTR
• INPR and OUTR communicate with the terminal serially and with the
AC in parallel.
• The flags are needed to synchronize the timing difference between
I/O device and the computer.
Interrupts
• Interrupt is the request signal by I/O device for servicing the device by processor.
• With interrupts, the running program is not responsible for checking the status of
I/O devices.
• Instead, it simply does its own work, and assumes that I/O will take care of itself!
• When a device becomes ready, the CPU hardware initiates a branch to an I/O
subprogram called an interrupt service routine (ISR), which handles the I/O
transaction with the device.
• An interrupt can occur during any instruction cycle as long as interrupts are
enabled.
• When the current instruction completes, the CPU interrupts the flow of the
program, executes the ISR, and then resumes the program.
• The program itself is not involved and is in fact unaware that it has been
interrupted.
• Interrupts can be globally enabled or disabled via the IEN flag (flip-flop). If
interrupts are enabled, then when either FGI or FGO gets set, the R flag
also gets set. (R = FGI V FGO)
• This allows the system to easily check whether any I/O device needs
service. Determining which one needs service can be done by the ISR.
• If R = 0, the CPU goes through a normal instruction cycle. If R = 1, the CPU
branches to the ISR to process an I/O transaction.
• The interrupt cycle is a HW implementation of a branch and save return
address operation.
• At the beginning of the next instruction cycle, the instruction that is read
from memory is in address 1.
• At memory address 1, the programmer must store a branch instruction
that sends the control to an interrupt service routine.
• The instruction that returns the control to the original program is “indirect
BUN 0".
End of chapter 03

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