Subroutines and Loop Delay
Subroutines and Loop Delay
The stack is a reserved area of the memory in RAM where we can store temporary
information. Interestingly, the stack is a shared resource as it can be shared by
the microprocessor and the programmer. The programmer can use the stack to
store data. And the microprocessor uses the stack to execute subroutines. The 8085
has a 16-bit register known as the ‘Stack Pointer.’
This register’s function is to hold the memory address of the stack. This control is
given to the programmer. The programmer can decide the starting address of the
stack by loading the address into the stack pointer register at the beginning of a
program.
The stack works on the principle of First In Last Out. The memory location of the
most recent data entry on the stack is known as the Stack Top.
Direct method
In the direct method, the stack pointers address is loaded into the stack pointer
register directly.
Indirect method
In the indirect method, the stack pointers address is loaded into the stack pointer
register via another register pair.
LXI H, 8000H
SPHL
LXI H, 1234H
PUSH H
POP D
HLT
Delay Loops
Next, we will look into an example of using registered pair as loop counter for
generating some delay.
So, you see that in this example first the LXI B instruction, it will load the register pair B
C with the value 1000 hex. So, B register will get this 10 value, and the C register will
get the value 00. So, as a result total B C pair is now holding the value 1000 hex.
Now, next instruction is DCX B. So, that will decrement the B C pair by 1, and this is
actually this is decrementing the pair value by 1. So, actually the C value will become
will become FF and this B value will be modified accordingly. So, next we need to check
whether the B C pair has become 0 or not. And as we said that this DCX instruction does
not affect the 0 flag, whereas that decrement the single digits DCR affecting the status
flags. So, this DCX instruction does not affect the flag register.
So, we have to take a roundabout way. So, we move the content of C register to a register. So,
MOV A,C and with the idea that when this B C register content will become 0, both the B
and C register will have 0. So, we do ORA B; OR accumulator with the B register. So, A
register has got the value of C. So, if both the registers B and C were 0, then this OR
accumulator operation will be 0, and the OR accumulator the ORA instruction affects the
status register or the status flags. So, the Z flag will get affected. So, we can have a loop like
JNZ loop. So, there that will go back to this instruction whose label is loop. In different
assemblers you will find slight variation like, sometimes these labels are written directly in
this fashion where there is just a space between the opcode and the instruction. In some cases,
you will find that there is a there will be a colon after this loop. So, that way we have got this
loop as a label. So, that is identified in some assemblers like that.
So, next we will look into, how to calculate the delay that is introduced, as I said that this
looping is used mainly for this delay generation, because the code segment that we have seen
is not doing any other meaningful job that way. So, for this purpose we need to know what is
the time required for the individual instructions. In 8085 architecture; so this individual clock
cycles are called the T states, or time steps or individual clock steps. So, as you know that
there is a crystal connected to the 8085, that generates a clock signal for it and then, how
many clock cycles are taken will taken by a particular instruction is documented in the
manual, what we will essentially add all those clock cycles that are needed in different
instructions, and knowing the frequency of the oscillator connected crystal connected to the
chip. So, we can find out what is the actual delay produced by such code fragment. So, the
overall delay that is calculated is given by number of T states divided by the frequency. So, if
we have got MVI instruction for example, if we look into the manual you will find that this
requires 7 such clock cycles or 7 T s states. So, if the microprocessor is running at 2
megahertz, then this instruction will require about 3.5 microseconds to complete so that you
can calculate because that 7 clock cycles. So, that will turn out to be 3.5 microsecond for the
micro process. So, using this type of information we can calculate the time needed for any
code segment.
So, let us go back and to our first example of delay loop that we had, and try to see; what is
the amount of delay that it can generate. So, if this code fragment is put inside a bigger code,
then it will introduce some delay in that code. So, we will and as I said that this is necessary
many a times particularly when you are doing some display part, say for which the display
part it is meant for human being. So, our eyes will not be able to change even locate that
changes. So, I have to keep the display for some time when if it changes very fast then the
eye will not be able to see that change. So, these delay loops are used for that purpose. So, we
can use a loop to produce certain amount of time delay in a program. So, for example, if we
look into this program MVI C FF hex, then because decrement C and JNZ loop. So, if you
consult the manual you will find that this MVI instruction takes 7 T states then this decrement
C instruction takes 4 T states, and JZN loop it takes 10 T states. Now, the first instruction is a
loop initialization instruction. It is executed only once, if you look into this code fragment,
but MVI instruction is executed only once, the following instructions that is DCR C and JNZ
loop. So, that is they will be repeated 255 times, this FF value is the 255. So, it will be
repeated 255. So, if you add this two values of T states 10 and 4. So, total one iteration of
this, loop will take 14 T states. So, that is repeated 255 times. So, you can find out what is the
time required. So, 255*14.
Of course, there is another important issue that the last iteration of the loop. So, JZN will fail,
and require only 7 T states rather than 10 T states. So, this is this is a very I should say
minute delay calculation, because this JNZ loop instruction. So, it takes 10 T state when the
loop is successful, because in that case the program counter has to be loaded with the value
from the from the memory the what whatever is the instruction this offset the loop. So, that
has to be loaded into the program counter. So, that takes time. Where as, if the loop fails that
is if the Z flag is set, in that case that last part of the instruction is not executed where the
program counter will be loaded with the value of this loop address. So, that is not executed,
that requires some less number less clock cycles and that is B C that requires 7 T states rather
than 10; so to calculate correctly. So, we should deduct these 3 T states from the total delay
from the loop, and the total delay of the program fragment is given by T delay is To + Tl
where To is the delay outside the loop, Tl is the delay of the loop and T delay is the total
delay. So, if there are a number of instructions which are not in the loop, which are outside
the loop so, they will contribute to To calculation. In our case there is only a single
instruction which is initializing the C register with the value.
So, in our case this To is equal to 7 T states delay of the MVI instruction, and Tl is (14*255)-
3, because for the last iteration JZN will not require that 3 cycles. So, it will require 7 cycles
instead of 10. And that boils down to 3567 T states; so 14 T states for the 2 instructions. So,
that is repeated 255 times reduced by 3 T says that is for the final calculation of T l.