PIC18 Assembly Language Programming
PIC18 Assembly Language Programming
LABORATORY MANUAL
Assembly Language Programming, PIC18 Input Output
Interfacing, Arithmetic Operations & Logic Operations
1. OBJECTIVES:
1.1 Code PIC Assembly language conditional branch instructions
1.2 Explain conditions that determine each conditional branch instruction
1.3 Calculate target addresses for conditional branch instructions
1.4 To learn how to code PIC programs to generate time delay
1.5 To learn how to code PIC Assembly language instructions to create loops
1.6 To describe the stack and its use in the subroutines
1.7 To program the I/O Port by using MPLAB assembly language.
1.8 To familiarize with hardware connections, registers configuration and I/O
ports.
1.9 To learn on how to code addition, subtraction, multiplication and division
instructions for unsigned data.
1.10 To learn how to code PIC assembly language logic instructions AND, OR,
and EX-OR.
1.11 To learn how to use PIC logic instruction for bit manipulation.
1.12 To learn how to use compare and skip instruction for program control.
3. INTRODUCTION:
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It must be noted that all conditional jumps are short jumps, meaning that the
address target must be within 256 bytes of the contents of the program
counter (PC).
3.1.1.1 BZ (Branch if Z = 1)
In this instruction, the Z flag is checked. If it is high, it jumps to
the target address. For example:
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GOTO $
This will also work for the BRA instruction, as shown below:
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3.1.4 Call
Call can be used to call subroutines located anywhere within the 2M
address space of 00000-1FFFFH for the PIC18. To make sure that the PIC
knows where to come back to after execution of the called subroutine, the
microcontroller automatically saves on the stack the address of the
instruction immediately below the CALL. When a subroutine is called,
control is transferred to that subroutine, and the processor saves the PC
(program controller) of the next on the stack and begins to fetch
instructions from the new location. After finishing execution of the
subroutine, the instruction RETURN transfers control back to the caller.
Every subroutine needs RETURN as the last instruction.
3.1.5 Stack
The storing of CPU information such as the program counter on the stack
as called a PUSH, and loading the contents of the stack back into a CPU
register is called a POP. In other words, a register is pushed onto the stack
to save it and popped off the stack to retrieve it.
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3.1.6 Delay
In creating a delay using assembly language instructions, one must be
mindful of two factors that can affect the accuracy of the delay:
1. The crystal frequency
2. The PIC design
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Figure 1
3.2.1.3 PORTA
Port A occupies a total of 7 pins (RA0-RA6) refer figure 1, but for
the P1C8F4580, pin A6 is used for the OSC2 pin. A6 is not
available if we use a crystal oscillator to provide frequency to the
PIC18 chip.
To use the pins of PORT A as both input or output ports, each bit
must be connected externally to the pin by enabling the bits of the
TRISA register.
3.2.1.4 PORT B
Port B occupies a total of 8 pins (RB0-RB7) refer figure 1.To use
the pins of PORT B as both input or output ports, each bit must be
connected externally to the pin by enabling the bits of the TRISB
regis
3.2.1.5 PORT C
Port C occupies a total of 8 pins (RC0-RC7) refer figure 1.To use
the pins of PORT C as both input or output ports, each bit must be
connected externally to the pin by enabling the bits of the TRISC
register.
3.2.1.6 PORT D
Port D occupies a total of 8 pins (RD0-RD7) refer figure 1.To use
the pins of PORT D as both input or output ports, each bit must be
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3.2.1.7 PORT E
Port E occupies a total of 3 pins (RE0-RE2) in the PIC18F4580
refer figure 1.Port E is used for 3 additional analog inputs or
simple I/O: AN5, AN6, and AN7.
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To monitor the status of a single bit for LOW, we use the BTFSC
instruction .This instruction tests the bit and skips the next
instruction if it is HIGH.
The sum is stored in the WREG register. The instruction could change any
of the C, DC, Z, N, or OV bits of the status register, depending on the
operands involved.
The value in WREG is added to the fileReg and the result is stored in
either the fileReg or WREG.
The value in WREG is added to the fileReg and the result is added with
carry. The result is stored in destination. As example below:
3.3.2 The DAW (decimal adjust WREG) instruction in the PIC18 is provided to
correct the hexadecimal-to-decimal problem associated with BCD
addition. The mnemonic “DAW” works only with an operand in the
WREG register. The DAW instruction will add 6 to the lower nibble or
higher nibble if needed; otherwise, it will leave the result alone. The
following example will verify these points.
After the program is executed, register WREG will contain 72H (47 + 25
= 72). Note that the “DAW” instruction only works on WREG.
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The number in WREG is subtracted from the fileReg and the result will be
saved either in fileReg or WREG.
This instructions is used for multibyte numbers and will take care of the
borrow of the lower byte. If C = 0 prior to executing the instructions, it
also subtracts 1 from the result. See example below:
After the SUBWF, loc 6 has = 62H – 96H = CCH and the carry flag is set
to 0, indicating there is a borrow (notice, N = 1). Because C = 0, when
SUBWFB is executed the fileReg location 7 has = 27H – 12H – 1 = 14H.
Therefore, we have 2762H – 1296H = 14CCH.
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3.3.6 In signed byte operands, D7 (MSB) is the sign and D0 to D6 are set aside
for the magnitude of the number. If D7 = 0, the operand is positive, and if
D7 = 1, it is negative. The N Flag in the status register is the D7 bit.
3.3.7 The range of positive numbers that can be represented by the format is 0 to
+127. If a positive number is larger than +127, a 16-bit operand must be
used.
For negative numbers, D7 is 1; however, the magnitude is
represented in its 2’s compliment. To convert to negative number
representation (2’s compliment), follow these steps:
1. Write the magnitude of the number in 8-bit binary (no sign).
3. Add 1 to it.
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3.4.1 AND
This instruction will perform a logical AND on the two operands place the
result in WREG. There is also the “ANDWF fileReg, d” instruction where
the destination can be WREG or fileReg. The fileReg operand can be any
register in the data RAM file register. The AND instruction will effect the Z
and N flags. N is D7 of the result, and Z = 1 if the result is zero. The AND
instruction is often used to mask (set to 0) certain bits of operand.
Solution:
3.4.2 OR
3.4.3 EX-OR
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4. EXAMPLE
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