Chapter 3

Fundamentals
of Logic
 Section 3.3

Basic Logic Functions

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 Section 3.3.1

The Binary Concept

 Section 3.3

The Binary Concept

Binary refers to the idea that many things can be
thought of as existing in only one of two states.

The binary states

are 1 and 0

The 1 and 0 can represent:

ON or OFF
Open or Closed
True or False
High or Low
A logic gate is a circuit with several inputs but
only one output that is activated by particular
combinations of input conditions.

Logical AND Gate

The high beam light of an automobile is programmed

to be turned on only when the light switch AND the
high beam switch are closed.
 The dome light of an automobile is programmed to
be turned on whenever the passenger door switch
OR the driver door switch is activated.

Logical OR Gate
 Section 3.3.2

AND, OR, and NOT Functions

 The AND Function
An AND gate is a
device with two or
more inputs and
one output.

The AND gate

output is 1 only if
all inputs are 1.
The AND Function

• If all inputs are 1,

the output will be 1.

• If any input is 0, the

output will be 0.
 The AND Function
The AND logic The light will
gate operates be on only
similarly to when both
control devices switch A and
connected in switch B are
series closed.
 The OR Function

An OR gate can have

any number of inputs
but only one output.

The OR gate
output is 1 if
one or more
inputs are 1.
The OR Function

• If one or more inputs are

1, the output is 1.

• If all inputs are 0, the

output will be 0.
The OR Function
The OR logic gate operates
similarly to control devices
connected in parallel.
The light will be on if
switch A or switch B or
both are closed.
 The NOT Function

The NOT function can

have only one input.

The NOT output is 1

if the input is 0.

The output is 0 if the

input is 1.
 The NOT Function
The circle indicates that The bar across the top
an inversion of the logical of the letter, indicates
function has taken place. an inverted output.

The result of the NOT operation is always

the inverse of the input, and the NOT
function is, therefore, called an inverter.
The NOT Function
The NOT function can be
performed on a contact
input simply by using a
normally closed instead of a
normally open contact.
 The NOT Function
NOT function used in conjunction with an AND
gate on a low pressure indicator circuit.
The NAND Function
An AND gate with an
inverted output is
called a NAND gate.

The NAND gate

has the opposite
outputs to
the AND gate.
The NOR Function
A OR gate with an
inverted output is
called a NOR gate.

The NOR gate

has the opposite
outputs to
the OR gate.
The Exclusive-OR (XOR) Function

The output of the XOR

gate is HIGH (1) only
when one input or the
other is HIGH, but not
both.

The exclusive-OR gate

is commonly used for
the comparison
of two binary numbers.
 Section 3.4

Boolean Algebra
The mathematical study of the binary number
system and logic is called Boolean algebra.

Boolean algebra is used to write combinations of

logic statements that are used to solve PLC
programming problems.
Boolean algebra as related to AND, OR, and NOT
functions.
Logic operators used form logical statements.
 Logic
operators
used to
form
Boolean
equations.
Some laws of Boolean algebra are similar to
those of ordinary algebra.

This law holds true only

in Boolean algebra
 Section 3.5

Representing the Boolean

Expressions
 Section 3.5.1

Developing Logic Gate

Circuits from Boolean
Expressions
 Logic gate circuit developed from the
Boolean expression Y = AB + C.
Gates required:

1 - AND gate with input A and B

1 - OR gate with input C and output from previous

AND gate
 Logic gate circuit developed from the
Boolean expression Y = A (BC + D).
Gates required:
1 - AND gate with input B and C
1 - OR gate with inputs BC and D
1 - AND gate with inputs A and the output from
the OR gate
 Section 3.5.2

Producing the Boolean

Equation for a Given Logic
Gate Circuit
Determining
the logic circuit
Boolean
equation

The output of the OR gate is A + B

The output of the inverter is D

Based on the input combination applied to the

AND gate the Boolean equation for the circuit
is Y = C D (A +B)
Determining
the logic circuit
Boolean
equation

The output of AND gate 1 is AB

The output of AND gate 2 is AB

Based on the combination of inputs applied to the OR

gate the Boolean equation for the circuit is
Y = A B + AB
 Section 3.6

Hardwired Logic versus

Programmed Logic
The term hardwired logic refers to logic control
functions that are determined by the way devices
are electrically interconnected.
Hardwired motor
Hardwired control program.
logic is fixed
and changeable
only by altering
the way devices
are electrically
interconnected.
Programmable control is based on the basic
logic functions, which are programmable
and easily changed.
PLC programmed motor control program.
Simulated PLC motor control program.

I/O Ladder Logic Program

 The most common PLC programming language
is ladder logic .

A ladder logic program consists of several rungs, each of

which controls an output.
Each rung is a combination of input conditions
(symbols) connected from left to right, with the symbol
that represents the output at the far right.
 Relationship between the relay ladder
schematic, the ladder logic program,
and the equivalent logic gate circuit.

Two limit switches connected in series and used to

control a solenoid valve.
Program simulation of two switches in
series used to control an output.

I/O Program
Two limit switches connected in parallel
and used to control a solenoid valve.
 Program simulation of two switches in
parallel used to control an output.

I/O Program

Copyright (c) 2017 McGraw-Hill Education. All rights reserved. No reproduction or distribution without the prior written consent of McGraw-Hill
Education
 Two limit switches connected in parallel with
each other and in series with a pressure
switch to control a pilot light.

Copyright (c) 2017 McGraw-Hill Education. All rights reserved. No reproduction or distribution without the prior written consent of McGraw-Hill
Education
Program simulation of two switches in parallel and this
pair in series with a switch used to control an output.

I/O Program
Two limit switches connected in parallel with each
other and in series with two sets of flow switches
(in parallel), and used to control a pilot light.
Program simulation of two switches in parallel and
in series with a second pair of switches in parallel.

I/O Program
Two limit switches connected in series with
each other and in parallel with a third limit
switch, and used to control a warning horn.
Program simulation of two switches in series
and in parallel with a third switch.

I/O Program
Two limit switches connected in series with each
other and in parallel with two other limit switches
(in series), and used to control a pilot light.
Program simulation of two switches in series and
in parallel with a second pair in series.

I/O Program
One limit switch connected in series with a
normally closed pushbutton and used to
control a solenoid valve.
Program simulation of one switch connected in series
with a normally closed pushbutton.

I/O Program
The output lamp of this circuit is ON only when
pushbutton A or B is pressed, but not both.
Program simulation of an exclusive OR circuit.

I/O Program
When either start button is depressed, the
motor runs. Either stop button stops the motor
when it is depressed.
Program simulation of a motor starter circuit.

I/O Program
 Section 3.7

Programming Word Level

Logic Instructions
Selecting Word Logic Instructions
Word-level
AND
instruction

This instruction tells the processor to perform an AND

operation on B3:5 and B3:7 and to store the result in
destination B3:10 when input device A is true.
Program simulation of the word level AND instruction.
Program

I/O B3 Data Table

Word-level
OR
instruction

This instruction ORs the data in Source A, bit by bit,

with the data in Source B and stores the result at the
destination address.
Program simulation of the word level OR instruction.
Program

I/O B3 Data Table

Word-level
XOR
instruction

Data from input I:1.0 are compared, bit by bit, with

data from input I:3.0. Any mismatches energize the
corresponding bit in word O:4.0.
Program simulation of the word level XOR instruction

I:1 I:3 O:4 Input Table

 Word-level NOT operation.

The bit pattern in B3:10 is the result of the

instruction being true and is the inverse of the bit
pattern in B3:9.
Program simulation of the word level NOT instruction