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AppNote Vectorless Scan in RedHawk-SC

The document describes RedHawk-SC's vectorless scan flow capability which allows for scan mode IR drop analysis using early design data without needing scan vector VCD files. It discusses scan constraint file formats, converting files from other tools, and how to set up the flow in RedHawk-SC by specifying required inputs like scan chain JSON files and a scan clock in the STA/SDC file.

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0% found this document useful (0 votes)
38 views9 pages

AppNote Vectorless Scan in RedHawk-SC

The document describes RedHawk-SC's vectorless scan flow capability which allows for scan mode IR drop analysis using early design data without needing scan vector VCD files. It discusses scan constraint file formats, converting files from other tools, and how to set up the flow in RedHawk-SC by specifying required inputs like scan chain JSON files and a scan clock in the STA/SDC file.

Uploaded by

icmoneystars
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
Download as pdf or txt
Download as pdf or txt
You are on page 1/ 9

Vectorless Scan Flow in

RedHawk-SC
Version: 2020.1.2

Table of Contents
1. Background ................................................................................................................................................ 1
2. Scan Constraint Files .............................................................................................................................. 2
2.1 Format of JSON File.............................................................................................................................. 3
2.2 Converting third-party scan chain files ................................................................................................ 3
2.2.a Script to convert 3rd party format to RH compatible format: ..................................................... 3
2.2.b Script to convert RH compatible format to RHSC compatible format: ........................................ 4
3. Flow Setup in RHSC .................................................................................................................................... 4
3.1 Required Inputs.................................................................................................................................... 4
3.2 Example run.py .................................................................................................................................... 5
4. Scan Shift Operation .................................................................................................................................. 5
4.1 Synchronizer flops................................................................................................................................ 7
4.2 Multi-bit flops ...................................................................................................................................... 8
5. Summary .................................................................................................................................................... 9

1. Background
Typically, IR drop analysis is done for the normal functional modes. DFT or scan mode is not considered
for DvD as the frequency of operation is lesser. However, in scan mode, simultaneous switching of large
number of registers give rise to high peak current and di/dt effects which, when coupled with package
inductance is bound to introduce significant IR drop issues.

Scan mode analysis is required to capture these high peak current and di/dt effects seen when activating
scan chains in an SoC design. It can also capture secondary effects such as unintentional switching in the
data path. Typically, this flow requires a scan mode gate VCD to annotate the activity on the scan flops.
However, RedHawk-SC offers the option to perform vectorless scan mode analysis, where the flow can be
easily set up with early-stage design data (no need of gate VCD).

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Gate-level timing-annotated VCD with scan activity is usually available very late in design cycle. Evaluating
potential issues such as IR drop due to simultaneous clock switching and scan functionality can be
achieved (based on initial placement) using the scan methodology. Here, RHSC generates the scenario
from constraint file specifications, can avoid many cases of chip failure and yield reduction. It is, therefore,
advisable to run scan mode analysis in addition to regular functional analysis.

The vectorless scan mode in RedHawk-SC uses the pattern provided in the scan chain file in order to come
up with the activity at the scan chain outputs. The delay offered by each cell in the scan chain is picked up
from the liberty file. It must be noted that the pattern is treated as golden and will be honored at every
point in the chain. This means, for example, that inversion logic in the path will not flip the pattern for
cells downstream.

2. Scan Constraint Files

Vectorless scan mode analysis requires one or more scan chain files in addition to the regular input
collateral needed for dynamic analysis. Scan constraint files contain a detailed description of each scan
chain in the design – this includes the chain name, a list of instance-pins per chain in sequential order, the
pattern to be used in this chain, the scan clock name and other modifiers that will affect the output
sequence. The modifiers that may be specified are:

1. Pattern: The pattern to be shifted into the registers in this scan chain (a string, for example,
‘11010’)
2. Start Shift: The number of shifts already completed before starting the simulation. If negative,
there will be a delay before the first pattern bit is introduced.
a. Typically, this is expected to be a negative value indicating the number of cycles to be
completed before the first shift-in operation.
b. Additionally, if the start shift is a negative number having a higher magnitude than the
length of the scan chain (scan chain is 10 flops long, start_shift is -15), it will be reset to 0.
3. Previous Pattern: The bit/bits to be used until ‘start_shift’ is completed, in case ‘start_shift’ is a
negative number

RHSC scan chain files are expected to be defined in a JSON file. The user can provide separate JSON files
for each scan chain, or a single JSON file with multiple chains defined in it, or multiple JSON files with many
scan chains described in each file. In case of a broken chain, the breakpoint instance will be assigned some
random activity based on the scenario activity settings. If the scan chains are accurate, it is advisable to
keep activity level to 0 to avoid unwanted switching.

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2.1 Format of JSON File

# The JSON syntax is quite strict! Please refer to the example below –
# especially regarding the placement of commas, double-quotes and braces.
# You may optionally verify the json file syntax with the following commands:
#
# import json
# with open(‘scan_chain.json’, ‘r’) as scan_chain_file:
# json.load(scan_chain_file)

{
"chain_normal": {
"instance_pins": [
"reg1/Q", # each element is separated by a comma
"reg2/Q",
"reg3/Q",
"reg4/Q",
"reg5/Q" # no comma after the last element
],
"pattern": "101",
"previous_pattern": "0",
"scan_clock": "clk_scan",
"start_shift": 0 # no comma after the last element
},
"chain_start_shift": {
"instance_pins": [
"reg6/Q",
"reg7/Q",
"reg8/Q",
"reg9/Q",
"reg10/Q"
],
"pattern": "101",
"previous_pattern": "0",
"scan_clock": "clk_scan",
"start_shift": -1
}
}

2.2 Converting third-party scan chain files

AE scripts are available to convert scan chain files from third-party tools to an RH-style scan chain format.
Another script is available to convert an RH-style scan constraint file to the RHSC json file.

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© 2020 ANSYS Inc
• 2.2.a Script to convert 3rd party format to RH compatible format:
<RHSC_build>/gps/pythonpkgs/thpkgs/ae_utils/convert_to_rh_scan_format.py

# Usage: python convert_to_rh_scan_format.py -option <input_file> [-o


<output_file>]
# option: -syn
# -tmx
# -scan_def
# -pnr
# -mgc [-front_path <front_path>] [-block_name <block_name>]
# setting within [] is optional

• 2.2.b Script to convert RH compatible format to RHSC compatible format:


<RHSC_build>/gps/pythonpkgs/thpkgs/ae_utils/convert_rh_to_rhsc_scan_format.py

Check help of the function as below to get the usage details

>>> from thpkgs.ae_utils import convert_rh_to_rhsc_scan_format


>>> help(convert_rh_to_rhsc_scan_format.convert_rh_to_rhsc_scan_format)

3. Flow Setup in RHSC


Vectorless Scan can be done in RHSC by providing the relevant arguments and inputs to ScenarioView and
TimingView. No other changes are required as compared to a regular vectorless dynamic run.

3.1 Required Inputs


1. Scan chain files in JSON format
2. STA or SDC file with scan clock defined
a. If the user wishes to honor the STA arrival times, it is mandatory to set the event time
precedence argument in ScenarioView to ‘sta_propagated’.

Typically, scan flops are operated using a lower frequency clock. Customers are expected to provide a scan
mode STA file with different clock definitions (or, alternatively, a scan mode SDC file with the necessary
clock definitions). Running this flow using the normal STA file will not result in any error/warning.
However, depending on the pattern, there may be a massive overshoot from the expected demand
current and severe di/dt effects.

In addition to the input collaterals mentioned above, the flow requires the addition of three arguments
while creating scenario view. These are:

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© 2020 ANSYS Inc
1. scan_operation: Specify the scan operation desired – currently, only the ‘shift’ operation is
supported.
2. num_shifts: Number of shifts to be performed. Note that this number needs to be in sync with
the scenario_duration argument.
a. If scenario_duration is less than the time required for num_shifts cycles of the scan clock,
then the scenario will have only as many shift operations as can be accommodated within
the specified duration.
b. If scenario_duration is more than the time required for num_shifts cycles of the scan
clock, then the extra scenario duration will have only regular clock events and other
vectorless activity (if any such activity is specified).
3. scan_chain_data: Pointers to the scan chain json files, in a list of dicts format. An example is shown
in Section 3.2 below.

The vectorless scan flow requires the use of a normal vectorless propagated scenario. In other words,
scenario types such as No-Propagation Vectorless scenarios cannot be used for this case.

3.2 Example run.py


< .. launcher setup, db and previous view creation .. >

#list of dicts with pointers to the scan chain files


scan_chains = [{‘file_name’: ‘./rhsc_scan_1.json’},
{‘file_name’: ‘./rhsc_scan_2.json’, ‘previous_pattern’: 1,
‘pattern’ : ‘01011’, ‘start_shift’ : -2 }] #override the parameters
given in json file

#create the scenario view


scn_scan = db.create_scenario_view(....,
timing_view = tv_scan, #TimingView using scan mode
STA
scan_operation = “shift”, #Specify scan operation
num_shifts = 4, #Number of shifts to be done
scan_chain_data = scan_chains, #list of dicts as
above
....)

< .. analysis view, reporting scripts if any .. >

4. Scan Shift Operation

Scan shift is a highly deterministic scenario mode. This means that, for a given combination of scan chains,
scan pattern, and other modifiers, the events at the output of each flop can be calculated beforehand.
Consider the following case:

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Chain length = 5, Num shifts = 2, Start shift = -1, Pattern = “110”, Previous Pattern = 1

This chain can be specified in the scan chain file using the following lines:

{
"chain_normal": {
"instance_pins": [
"reg1/Q",
"reg2/Q",
"reg3/Q",
"reg4/Q",
"reg5/Q"
],
"pattern": "110",
"previous_pattern": "1",
"scan_clock": "clk_scan",
"start_shift": -1
}
}

In this case, the output at each flop at each cycle will be:

Figure 1: Sequence of shifts in a scan chain

Here, Cycle N refers to the Nth clock edge. For fall edge triggered flops, the shift will occur at the falling
clock edge. The process to determine the state of each flop can be roughly summarized as:

1. Fill the last -(start_shift) flops with previous_pattern

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© 2020 ANSYS Inc
a. reg5 is filled with ‘1’
2. Fill the next pattern_length flops (going towards the head of the chain) with the actual pattern
a. reg4, reg3, reg2 are filled with ‘0’, ‘1’, ‘1’
b. The LSB of the pattern will be shifted out first (after cycle 1)
3. Continue to fill the rest of the chain with the pattern, till the first instance is reached. This will give
us the initial conditions for all the flops
a. reg1 is filled with ‘0’
4. At each clock triggering edge, shift the data from Flop_N to Flop_N+1. For Flop 0, insert the correct
bit such that the pattern is maintained
a. ‘1’ is inserted at reg1 in cycle 1, ‘1’ is inserted at reg1 in cycle 2

The working of each of the modifiers can be understood from the above example.

4.1 Synchronizer flops

Synchronizer flops are cells made of multiple flops connected in series internally with one output pin. An
N-bit synchronizer flop has ‘N’ flops connected in series. This means N clock cycles are needed to shift one
bit as compared to a normal flop. In RHSC, we need to mark synchronizer flops by specifying the ‘extra
cycles’ parameter in the scan chain file. Typically, an N-bit synchronizer flop requires N-1 extra cycles.
Further, at any given moment, we can only see the state of the ending flop - thus, synchronizer flops can
have apparent “hidden” bits.

Synchronizer flops need to be specified using a separate dict within the scan chain file. The syntax for
marking a synchronizer flop is

"chain_synchronizer": {
"instance_pins": [
"reg1/Q",
{“ip”:"reg2_sync/Q",”extra_cycles”:2}, #3-bit sync flop
"reg3/Q",
"reg4/Q",
"reg5/Q"
],
"pattern": "101",
"previous_pattern": "1",
"scan_clock": "clk_scan",
"Start_shift": -1
}

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© 2020 ANSYS Inc
Figure 2: Hidden bits in a sync flop

4.2 Multi-bit flops

Each flop in an MBFF is treated as an individual flop. This means it takes one cycle to shift one bit for each
output. MBFF output bits need to be covered in the scan chain.

The syntax for a 4-bit MBFF:

{
"chain_mbff": {
"instance_pins": [
"reg_mb1/Q_0_" #Each mbff bit should be given separately
"reg_norm1/Q",
"reg_norm2/Q",
"reg_mb2/Q_3_",
"reg_mb3/Q_4_",
],
"pattern": "101",
"previous_pattern": "1",
"scan_clock": "clk_scan",
"start_shift": -1
}
}

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5. Summary

Scan mode analysis is an important step in order to understand the effects of high peak current and
synchronous switching, which happens when scan chains are activated in an SoC. RedHawk-SC offers a
unique feature that enables such an analysis much earlier in the design cycle – Vectorless Scan. The user
only needs to provide a scan constraint file describing the scan chains. The scan mode scenario uses this
data to construct switching information for the scan chain flops and uses the associated electrical models
to determine the demand currents. This can subsequently be used for IR drop analysis in the scan mode,
which will help to capture any issues due to high peak current and dI/dt effects.

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© 2020 ANSYS Inc

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