ANSWERS 2 Microprocessor & Assembly Language Programming Year III Semester II
ANSWERS 2 Microprocessor & Assembly Language Programming Year III Semester II
SPC 2312 Microprocessor & Assembly Language Programming Year III Semester II
Date: Friday 17th June, 2022 Time: 8.30 am – 10.30 am Section (30 Marks)
Question One (30)
a) Explain why data transfer instructions are important 4 Marks
Data transfer instructions are fundamental operations in any microprocessor. They are
crucial for:
1. Moving data between registers and memory locations: This allows the
processor to load data from memory into registers for processing and store
results back to memory.
2. Communication with peripheral devices: Data transfer instructions enable
the processor to send data to devices (like sending commands to a printer) or
receive data from devices (like reading data from a keyboard).
3. Performing arithmetic and logical operations: Many arithmetic and logical
instructions (like addition, subtraction, AND, OR) inherently involve transferring
data between registers during the operation.
i) Interrupt Latency:
Interrupt latency refers to the time delay between the assertion of an interrupt request
by a device and the moment the processor starts servicing the interrupt. This delay
can be influenced by factors like:
Direct Memory Access (DMA) is a technique that allows certain devices (like disk
controllers, network cards) to transfer data directly between their memory and the
system's main memory without involving the processor at every step. This offloads
data transfer tasks from the processor, improving overall system performance,
especially for high-bandwidth data transfers.
1. Data Rate Matching: Peripheral devices may have different data transfer rates
compared to the processor. Buffers can temporarily store data from a faster
device or provide data to a slower device, smoothing out these differences and
ensuring smooth communication.
2. Synchronization: Buffers can help synchronize data flow between the
processor and peripherals. The processor can write data to a buffer without
waiting for the device to be ready, and the device can read data from the buffer
at its own pace.
3. Reduced CPU Load: By handling data transfer asynchronously using buffers,
the processor can focus on other tasks while data is being transferred between
the device and memory.
4. Error Handling: Buffers can be used to store data during error recovery
situations. For example, if a transmission error occurs, the data can be
re-transmitted from the buffer.
i) MOV CX, CS
1. Reliable Data Transfer: Both the processor and the peripheral device can
explicitly signal their readiness to send or receive data. This ensures that data
isn't sent or received when the other party is not prepared, preventing data
corruption or loss.
2. Error Detection: Handshake protocols often include mechanisms for error
detection. If a transmission error occurs, the devices can signal the error and
potentially re-send the data, improving data integrity.
g) Explain any Two factors that affect characteristics and performance of a bus in a
microprocessor system 4 Marks
1. Bus Width: The bus width determines the number of bits that can be
transferred simultaneously on the bus. A wider bus allows for faster data
transfer compared to a narrower bus (assuming the same clock speed).
2. Bus Speed: The bus speed, measured in MHz (MegaHertz), indicates the
number of cycles the bus can perform per second. A higher bus speed
translates to faster data transfer rates.
3. Bus Multiplexing: Some buses may use multiplexing techniques to transmit
different types of signals (address, data, control) on the same physical wires at
different times. This can improve efficiency but adds complexity to the bus
design.
4. Signaling Method: Buses can use different signaling methods, such as
single-ended or differential signaling. Differential signaling offers better noise
immunity, which can be crucial for reliable data transmission at high speeds.
5. Bus Topology: The physical layout of the bus connections (e.g., point-to-point,
multi-drop) can impact performance and scalability. Point-to-point connections
offer dedicated bandwidth between devices but may not be suitable for large
systems. Multi-drop connections allow for more devices but require arbitration
mechanisms to avoid data collisions.
i) Cyclic Stealing:
● In cyclic stealing, the DMA controller steals a fixed number of bus cycles from
the processor at regular intervals (e.g., every few processor cycles).
● This allows for a steady flow of data transfer between the device and memory
without significantly interrupting the processor.
● However, cyclic stealing can introduce some overhead due to the constant
context switching between the processor and DMA controller.
Explanation:
1. The first MOV instruction loads the data byte located at offset 0500H within
segment 2000H into register AX.
2. The second MOV instruction (with the ADD opcode) adds the data byte located
at offset 0600H within segment 2000H to the value already present in AX (the
first data byte).
3. The final MOV instruction stores the result (sum) from AX back to memory
location 2000:0700H.
(Optional): The additional lines provide a way to terminate the program using the
DOS function for exiting.
Buses play a critical role in data transfer within a computer system. Here are three key
functions of buses:
1. Data Transfer: Buses provide a pathway for transferring data between various
components within a computer, such as the processor, memory, and peripheral
devices. The width of the bus determines the number of bits that can be
transferred simultaneously, impacting data transfer speed.
2. Address Lines: Buses also carry address signals that specify the source or
destination of the data being transferred. These address lines allow the
processor to locate specific memory locations or devices on the bus.
3. Control Signals: Control signals travel on the bus to coordinate data transfer
operations. These signals indicate whether the operation is a read or write,
synchronize the transfer process, and manage arbitration when multiple
devices attempt to use the bus simultaneously.
b) Use a block diagram to describe the input-output interface system of a
microprocessor system 6 Marks
DATA_SEGMENT ENDS
FACTORIAL_LOOP:
LOOP FACTORIAL_LOOP ; Decrement CX and loop if not zero
MUL AX, CX ; Multiply the result by the loop counter
FACTORIAL_DONE:
MOV @RESULT, AX ; Store the factorial in memory
INVALID_INPUT:
; Handle invalid input error (e.g., display message)
CODE_SEGMENT ENDS
Explanation:
1. The program defines a data segment with space to store the number and the
calculated factorial.
2. In the code segment, it loads the number from memory into register AX.
3. It checks if the number is negative or zero. If negative, it jumps to an error
handling section (optional). If zero, the factorial is already 1, so it jumps to the
result storage section.
4. Otherwise, it moves the number to the loop counter (CX).
5. The LOOP instruction decrements CX and jumps back to FACTORIAL_LOOP as
long as CX is not zero.
6. Inside the loop, the MUL instruction multiplies the current result in AX by the
loop counter (current number).
a) Explain Three important design issues that must be considered while designing
an instruction set 6 Marks
c) Describe the two main types of flags of 8086 microprocessor giving two
examples in each category 6 Marks
● Zero Flag (ZF): Set to 1 if the result of the last arithmetic or logical operation is
zero. (Example: MOV AL, 5; SUB AL, 5 sets ZF)
● Carry Flag (CF): Set to 1 if an arithmetic operation overflows or underflows
(carrying a bit into or out of the register). (Example: MOV AL, 255; ADD AL,
1 sets CF)
● Parity Flag (PF): Set to 1 if the result of the last operation has an even number
of 1 bits (even parity). (Example: MOV AL, 0101 sets PF)
● Auxiliary Carry Flag (AF): Set to 1 if a carry occurs between bit 3 and bit 4
during an addition or subtraction involving BCD (Binary-Coded Decimal)
numbers.
● Sign Flag (SF): Set to the sign bit (bit 7) of the result
Microcontrollers are tiny computers on a single chip, but they still require some
essential components for operation:
● Input/Output (I/O) peripherals for interacting with external devices (e.g., timers,
analog-to-digital converters, communication interfaces).
● Clock oscillator to provide timing signals for the CPU and other components.
● Offers a wider range of instructions, including complex ones that can perform
multiple operations in a single instruction.
● Advantages:
○ More concise code for specific tasks
● Disadvantages:
○ Slower execution due to hardware complexity
○ Less consistent instruction formats
● RISC: Ideal for tasks that emphasize speed and efficiency (e.g., embedded
systems, mobile devices).
● CISC: More suitable for scenarios where code size is a primary concern or
complex operations are frequently used.
DATA_SEGMENT SEGMENT
FACTOR1 DW 5 ; First constant (replace with actual value)
DATA_SEGMENT ENDS
START:
MOV DL, 2 ; Print two digits (can be adjusted based on result size)
CODE_SEGMENT ENDS
Explanation:
1. The program defines data for the two factors and the result.
2. In the code segment, it loads the first factor into register AX.
3. The MUL instruction multiplies AX by the second factor, whose address is
provided. (For large constants, overflow handling might be needed)
4. The result is stored back in memory at the RESULT location.
Prepared by: Joseph Mwaura Njenga | 0717065073 | Best Wishes in your Exam