Final Microprocessor and Assembly Language Programming Lab
Final Microprocessor and Assembly Language Programming Lab
This article contains information on 8086 microprocessor addressing mode and each addressing
mode is explained with examples.
Addressing modes are different ways by which CPU can access data or operands. They determine
how to access a specific memory address. To load any data from and to memory/registers, MOV
instruction is used. The syntax of MOV instruction is:
It copies the data of 2nd operand (source) into the 1st operand (destination). To access memory,
segment registers are used along with general-purpose registers.
If you don’t know about internal register of 8086 microprocessor, read this article:
There are seven addressing modes in 8086 processor. Now, we will discuss all of them in detail with
example assembly instructions.
This mode involves the use of registers. These registers hold the operands. This mode is very fast as
compared to others because CPU doesn’t need to access memory. CPU can directly perform an operation
through registers.
For example:
MOV AX, BL
MOV AL, BL
The above two instructions copy the data of BL register to AX and AL.
The ORG 100h is a directive which tells the compiler how to handle the source code.
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ORG 100h
MOV AX,CX
ret
Output:
In this example, you can see a red box in the output. This red box indicates the content of AX and
CX registers. The content of both AX and CX registers are the same. Because the above example moves
the content of CX into AX register.
In this mode, there are two operands. One is a register and the other is a constant value. The register
comes quickly after the opcode.
For example:
The instruction MOV AX, 30H copies hexadecimal value 30H to register AX.
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The instructions MOV BX, 255 copies decimal value 255 to register BX.
You cannot use the immediate addressing mode to load immediate value into segment registers. To
move any value into segment registers, first load that value into a general-purpose register then add this
value into segment register.
ORG 100h
Output
If 0320h is added directly into the DS register using MOV instruction, the compiler will generate an
error.
The hexadecimal value of 481 is 1E1. Assume DS=2162H then the logical address will be
2162:01E1. To compute physical address, shift left the DS register and add it to offset address. The
physical address will be 26120H + 1E1H=26301H. Hence, after execution of the MOV instruction the
contents of the memory location 26301H will be loaded into the register CX. The instruction MOV
[2481], CX will store the CX register content to memory location 26301H.
Example Code
ORG 100h
MOV BX, [481] ;load data from memory address 2162:01E1 into BX
Output
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In this example, the red box indicates the hexadecimal value 18 and decimal value 24 is stored at
memory address 21801h.
The register indirect addressing mode uses the offset address which resides in one of these three
registers i.e., BX, SI, DI. The sum of offset address and the DS value shifted by one position generates a
physical address. For example:
This instruction will calculate the physical address by shifting DS to the left by one position and
adding it to the offset address residing in SI. The brackets around SI indicates that the SI contain the
offset address of memory location whose data needs to be accessed. If brackets are absent, then the
instruction will copy the contents of SI register to AL. Therefore, brackets are necessary.
Example Code
ORG 100h
Output
In the above example, the physical address is 07080 + 042A = 74AA. According to the little-endian
convention, the 074AA will store the lowest bytes of data i.e., 54 and the 074AB will store the most
significant bits of data i.e. 01.
This addressing mode uses a base register either BX or BP and a displacement value to calculate
physical address.
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Physical Address= Segment Register (Shifted to left by 1) + Effective address
The effective address is the sum of offset register and displacement value. The default segments
for BX and BP are DS and SS. For example:
MOV [BX+5], DX
In this example, the effective address is BX + 5 and the physical address is DS (shifted left) + BX+5.
The instruction on execution will copy the value of DX to memory location of physical address= DS
(shifted left) +BX+5.
Example 1 Code
ORG 100h
Output
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The instructions given below will load the value from memory location to register.
MOV [BX+10], DX
Now, suppose the base register is BP. Then, in this case, the default segment would be SS. In the
above example, replace BX by BP. Now the physical address is equal to SS (shifted left) +BX+5 which
is equal to 742F.
Example 2 Code
ORG 100h
Output
This addressing mode is same as the based relative addressing mode. The only difference is it uses
DI and SI registers instead of BX and BP registers.
For example:
MOV [DI]+12, AL
This instruction on execution will copy the content of AL at memory address 7197 (7040 + 145 +
12)
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MOV BX, [SI]+10
This instruction will load the contents from memory address 7302 (7040 +2B2 +10) to register BX.
The based indexed addressing mode is actually a combination of based relative addressing mode
and indexed relative addressing mode. It uses one base register (BX, BP) and one index register (SI, DI).
For example:
Or
In this case, the physical address will be DS (Shifted left) + SI + BX + 20. Now, if we replace BX
with BP then the physical address is equal to SS (Shifted left) + SI + BX + 20.
Both expressions are illegal as this mode supports one base register and one segment register.
Example Code
ORG 100h
In conclusion, addressing modes are ways to access the operands. The programmer can use any of
these seven addressing modes depending upon the program.
In this article, we will see different types of data transfer instructions supported by the 8086
microprocessors. We will see the function of each instruction with the help of an assembly language
program. These are the instructions that transfer the data from source to destination. They include:
1. MOV Instruction
The MOV instruction copies a byte or a word from source to destination. Both operands should be of
same type either byte or a word. The syntax of this instruction is:
The destination operand can be any register or a memory location whereas the source operand can be
a register, memory address, or a constant/immediate. The 8086 MOV instruction supports the following
operands:
MOV [2310],
Immediate Memory Address
37B2
Segment
Reg MOV AX, DS
Register
Segment
Reg MOV CS, CX
Register
The instruction MOV mem, mem is illegal. It is not possible to transfer data directly from one
memory location to another. Therefore, both source and destination operands cannot be memory address.
The MOV instruction does not affect any value in the flag register.
Consider an example to understand the behavior of MOV instruction. In the code given below, a and
b are the variables. DB is used for storing byte and DW is used for storing a word (2 bytes).
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ORG 100h
a DW 5C21h
Output:
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The memory block has four columns. First column is of offset address. Second and third column
shows the hexadecimal value and decimal value stored in that offset address. The last column indicates
the ASCII character value. The 6th instruction in the code stores the hexadecimal value 6Ah at Physical
address 07189 (07120h + 0069h). In the 7th instruction, the value of AX is stored at physical address
07032 (07000h+0032h). The instruction MOV DL, [BX]+6 loads the value from memory location 07126
into DX shown in figure (3).
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The PUSH instruction pushes the data in the stack. The format of PUSH instruction is:
PUSH Source
It decrements the stack pointer by two and then stores the data from the source operand at the
position of the stack pointer. The source operand can be a general-purpose register, segment register or a
memory address but it should be a word.
The PUSH instruction decrements the SP by 2. You can see in the output the SP=FFFC which
decrements by 2 becomes FFFA. The data of AX is pushed to memory location DS: FFFA which is
16FFA in this example.
ORG 100h
PUSH BX ;SP=SP-2
Output
It is opposite to the POP instruction. The POP instruction loads the word from the stack pointed by
SP and then increments the SP by 2. The format for this instruction is:
POP destination
The destination operand can be a general-purpose register, segment register, or memory address. The
POP instruction does not support CS as a destination operation.
ORG 100h
PUSH BX ;SP=SP-2
POP [12H] ;Load the value from location of SP to memory address DS:0012H
;increment SP by 2
The XCHG instruction exchanges the contents of the source and destination. Both operands should
be of the same type either word (16 bits) or a byte (8 bits). It does not support segment registers. The
direct exchange of data between memory locations is illegal. Both operands should be a general-purpose
register. The syntax of instructions is:
For example
XCHG CL, 25[BX] exchanges bytes of CL with bytes stored in memory location DS:25+BX.
ORG 100h
a DW 5C21h
b DW 3D05h
Output
AX 5C21 CX 3D05
AH 5C CH 3D
AL 21 CL 05
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After execution of fourth instruction XCHG AX, CX, the contents of AX and CX are exchanged.
AX becomes CX and CX becomes AX.
AX 3D05 CX 5C21
AH 3D CH 5C
AL 05 CL 21
Then XCHG AH, CL exchanges the most significant bits of AH with lower bits of CL. The final
output becomes:
AX 3D05 CX 5C21
AH 21 CH 5C
AL 05 CL 3D
Just like MOV instruction, the XCHG instruction does not modify the contents of flag register. The
5. XLAT Instruction
The XLAT instruction takes no operands. It is used in lookup tables. The BX register contains the
offset address of the lookup table. The AL register has a byte number. The XLAT instruction takes the
byte number from AL and load the contents of address DS: BX+AL into AL register. The syntax for this
instruction is:
XLAT
or
XLAT Table_Name
First, you’ll have to store the starting offset address of table into BX register which is done by:
Now, consider an example which takes a variable a in a range 1 to 15 and display it as a hexadecimal
digit. We have taken a=13.
ORG 100h
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.MODEL SMALL
.DATA
TABLE DB '0123456789ABCDEF'
a DB 13
.code
MOV DL,AL
INT 21H
MOV AH,4CH
INT 21H
Output
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These two instructions are supported by 8086 microprocessors to take directly transfer data between
GPIO ports.
IN Instruction
The IN instruction takes the input from the port and transfers that data into the register. Thus, data
transfer takes place between register and I/O device. The syntax of IN instruction is:
IN AX, 29H
If you want to access a port number over 255 then first load the port address into DX and then use IN
instruction.
IN AX, DX
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OUT Instruction
The OUT instruction outputs the data of register on to a port specified in the instruction. The syntax
of this instruction is:
Example
OUT 26H, AL
If you want to use port address over 255, then store this port address to DX and then execute OUT
instruction
OUT DX, AX
LEA Instruction
The LEA stands for load Effective address. As the name implies, it takes the data from the source
and copies it to the destination operand. The destination is always a register whereas the source can be an
offset address of a variable or a memory location. Both MOV and LEA instructions copy data from
source to destination but the difference between them is LEA copies only offset address or a memory
address to destination register. The syntax of LEA instruction is:
For example:
ORG 100h
.MODEL SMALL
.DATA
VAR DB 23h
.code
Output
In this example, you can see in the memory block, the offset address of variable VAR is 0102h
which is stored in DX after execution of LEA instruction.
LDS Instruction
The LDS instruction stores four consecutive memory locations into a specified destination register
and a DS register. The format of LDS instruction is:
The word from first two memory locations is loaded into a register and the word from the next two
memory locations gets stored to DS register.
.MODEL SMALL
.DATA
VAR DB 23h
.code
LDS AX,VAR
RET
Output
You can observe from the output that the address of variable var is 07012. The words from 07102h,
07103h locations gets stored into AL and AH. The contents of other two memory addresses 07104h and
07105h are loaded into DS.
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This instruction is almost similar to the LDS instruction. It loads data from first two memory
locations to a specified register. The data of the next two memory location goes to ES register. The
syntax of LES instruction is:
ORG 100h
.MODEL SMALL
.DATA
NUM DB 5Ch
.code
LES SI,NUM
MOV AX,0710H
MOV DS,AX
LES BX,[8H]
RET
Output:
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The memory address of Num variable is 7102h. The instruction “LES SI, Num” sets SI to C45C and
ES to 0236. The next instruction “LES BX, [8H]” sets BX to 0710 and ES to D88E.
11. LAHF
The LAHF instruction loads the lower 8 bits of the flag register into AH register. The lower eight
bits of flag register includes SF, ZF, AF, PF and CF flags. It does not require any operand.
12. SAHF
The SAHF instruction stores the 8-bit data of AH register into the lower 8 bits of the flag register. It
has no operands.
13. PUSHF
It pushes the contents of flag register onto the top of stack. The PUSHF instruction decrements the
stack pointer by two and then store the data of flag register at location pointed by stack pointer (SP).
14. POPF
It pops the data from the first two memory locations pointed by stack pointer into the flag register
and then increment SP by 2. The POPF instruction has no operands.
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8086 assembler tutorials for beginners (part 3)
Variables
Variable is a memory location. For a programmer it is much easier to have some value be kept in a
variable named "var1" then at the address 5A73:235B, especially when you have 10 or more variables.
name DB value
name DW value
name - can be any letter or digit combination, though it should start with a letter. It's possible
to declare unnamed variables by not specifying the name (this variable will have an address
but no name).
value - can be any numeric value in any supported numbering system (hexadecimal, binary, or
decimal), or "?" symbol for variables that are not initialized.
As you probably know from part 2 of this tutorial, MOV instruction is used to copy values from source to
destination.
Let's see another example with MOV instruction:
ORG 100h
VAR1 DB 7
var2 DW 1234h
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Copy the above code to the source editor, and press F5 key to compile it and load in the emulator. You
should get something like:
As you see this looks a lot like our example, except that variables are replaced with actual memory
locations. When compiler makes machine code, it automatically replaces all variable names with
their offsets. By default segment is loaded in DS register (when COM files is loaded the value
of DS register is set to the same value as CS register - code segment).
In memory list first row is an offset, second row is a hexadecimal value, third row is decimal value,
and last row is an ASCII character value.
Compiler is not case sensitive, so "VAR1" and "var1" refer to the same variable.
The offset of var2 is 0109h, and full address is 0B56:0109, this variable is a WORD so it occupies 2
BYTES. It is assumed that low byte is stored at lower address, so 34h is located before 12h.
You can see that there are some other instructions after the RET instruction, this happens because
disassembler has no idea about where the data starts, it just processes the values in memory and it
understands them as valid 8086 instructions (we will learn them later).
You can even write the same program using DB directive only:
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ORG 100h
DB 0A0h
DB 08h
DB 01h
DB 8Bh
DB 1Eh
DB 09h
DB 01h
DB 0C3h
DB 7
DB 34h
DB 12h
Copy the above code to the source editor, and press F5 key to compile and load it in the emulator. You
should get the same disassembled code, and the same functionality!
As you may guess, the compiler just converts the program source to the set of bytes, this set is
called machine code, processor understands the machine code and executes it.
ORG 100h is a compiler directive (it tells compiler how to handle the source code). This directive is
very important when you work with variables. It tells compiler that the executable file will be loaded
at the offset of 100h (256 bytes), so compiler should calculate the correct address for all variables when
it replaces the variable names with their offsets. Directives are never converted to any real machine
code.
Why executable file is loaded at offset of 100h? Operating system keeps some data about the
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program in the first 256 bytes of the CS (code segment), such as command line parameters and etc.
Though this is true for COM files only, EXE files are loaded at offset of 0000, and generally use special
segment for variables. Maybe we'll talk more about EXE files later.
Arrays
Arrays can be seen as chains of variables. A text string is an example of a byte array, each character is
presented as an ASCII code value (0..255).
b is an exact copy of the a array, when compiler sees a string inside quotes it automatically converts it to
set of bytes. This chart shows a part of the memory where these arrays are declared:
You can access the value of any element in array using square brackets, for example:
MOV AL, a[3]
You can also use any of the memory index registers BX, SI, DI, BP, for example:
MOV SI, 3
MOV AL, a[SI]
If you need to declare a large array you can use DUP operator.
The syntax for DUP:
for example:
c DB 5 DUP(9)
is an alternative way of declaring:
c DB 9, 9, 9, 9, 9
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Of course, you can use DW instead of DB if it's required to keep values larger then 255, or smaller then -
128. DW cannot be used to declare strings.
There is LEA (Load Effective Address) instruction and alternative OFFSET operator.
Both OFFSET and LEA can be used to get the offset address of the variable.
LEA is more powerful because it also allows you to get the address of an indexed variables. Getting the
address of the variable can be very useful in some situations, for example when you need to pass
parameters to a procedure.
Reminder:
In order to tell the compiler about data type,
these prefixes should be used:
For example:
or
in certain cases the assembler can calculate the data type automatically.
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ORG 100h
RET
VAR1 DB 22h
END
ORG 100h
RET
VAR1 DB 22h
END
These lines:
LEA BX, VAR1
MOV BX, OFFSET VAR1
are even compiled into the same machine code: MOV BX, num
num is a 16-bit value of the variable offset.
Please note that only these registers can be used inside square brackets (as memory pointers): BX, SI, DI,
BP!
(see previous part of the tutorial).
Constants
Constants are just like variables, but they exist only until your program is compiled (assembled). After
definition of a constant its value cannot be changed. To define constants EQU directive is used:
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name EQU < any expression >
For example:
k EQU 5
MOV AX, k
MOV AX, 5
You can view variables while your program executes by selecting "Variables" from the "View" menu of
emulator.
To view arrays you should click on a variable and set Elements property to array size. In assembly
language there are not strict data types, so any variable can be presented as an array.
CHAR - ASCII char code (there are 256 symbols, some symbols are invisible).
You can edit a variable's value when your program is running, simply double click it, or select it and
click Edit button.
It is possible to enter numbers in any system, hexadecimal numbers should have "h" suffix, binary "b"
suffix, octal "o" suffix, decimal numbers require no suffix. String can be entered this way:
'hello world', 0
(this string is zero terminated).
Interrupts
Interrupts can be seen as a number of functions. These functions make the programming much easier,
instead of writing a code to print a character you can simply call the interrupt and it will do everything
for you. There are also interrupt functions that work with disk drive and other hardware. We call such
functions software interrupts.
Interrupts are also triggered by different hardware; these are called hardware interrupts. Currently we
are interested in software interrupts only.
To make a software interrupt there is an INT instruction, it has very simple syntax:
INT value
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Where value can be a number between 0 to 255 (or 0 to 0FFh),
generally we will use hexadecimal numbers.
You may think that there are only 256 functions, but that is not correct. Each interrupt may have sub-
functions.
To specify a sub-function AH register should be set before calling interrupt.
Each interrupt may have up to 256 sub-functions (so we get 256 * 256 = 65536 functions). In
general AH register is used, but sometimes other registers maybe in use. Generally other registers are
used to pass parameters and data to sub-function.
The following example uses INT 10h sub-function 0Eh to type a "Hello!" message. This function
displays a character on the screen, advancing the cursor and scrolling the screen as necessary.
; in AL register.
Copy & paste the above program to the source code editor, and press [Compile and Emulate] button. Run
it!
Example
SHL AL, 1
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Before execution:
CF AL
0 1 1 0 0 1 1 0 0
After execution:
CF AL
1 1 0 0 1 1 0 0 0
2. SAL
SAL destination, count
SAL (Shift Arithmetic Left) and SHL (Shift Logical Left) instructions perform the same operation and are
physically the same instruction.
Example
SAL AL, CL
SAL AL, 1
3. SHR
SHR destination, count
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This (Shift Logical Right) instruction shifts the bits in the destination operand to the right by the number of
bits specified by the count operand, either 1 or the number contained in the CL register. Example SHR BL,
1 SHR BL, CL
The SHR instruction may be used to divide a number by 2. For example, we can divide 32 by 2,
MOV BL, 32 ; 0010 0000 (32)
SHR BL, 1 ; 0001 0000 (16)
SHR BL, 1 ; 0000 1000 (8)
SHR BL, 1 ; 0000 0100 (4)
SHR BL, I ; 0000 0010 (2)
9. SAR
SAR destination, count
This (Shift Arithmetic Right) instruction shifts the bits in the destination operand to the right by the
number of bits specified in the count operand. Bits equal to the original high-order (sign) bits are shifted
in on the left, thereby preserving the sign of the original value
Example :
SAR BL, 1
Before execution:
CF BL
0 1 1 0 0 1 1 0 0
After execution:
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0 1 1 1 0 0 1 1 0
10. ROL
ROL destination, count
This (Rotate Left) instruction rotates the bits in the byte/word destination operand to the left by the
number of bits specified in the count operand.
Example:
ROL AL, 1
Before execution:
CF AL
0 1 1 0 0 1 1 0 0
After execution:
CF AL
1 1 0 0 1 1 0 0 1
11. ROR
ROR destination, count
This (Rotate Right) instruction rotates the bits in the byte/word destination operand to the right by the
number of bits specified in the count operand.
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Example:
ROR AL, 1
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Before execution:
CF AL
0 1 1 0 0 1 1 0 0
After execution:
CF AL
0 0 1 1 0 0 1 1 0
12. RCL
RCL destination, count
This (Rotate through Carry Left) instruction rotates the contents left through carry by the specified
number of bits in count operand.
Example:
RCL AL, 1
Before execution:
CF AL
1 0 0 0 0 1 1 1 1
After execution:
CF AL
0 0 0 0 1 1 1 1 1
13. RCR
RCR destination, count
This (Rotate through Carry Right) instruction rotates the contents right through carry by the specified
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number of bits in the count operand.
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Example:
RCR AL, 1
Before execution:
CF AL
1 1 1 0 0 0 0 1 0
After execution:
CF AL
0 1 1 1 0 0 0 0 1
String Instructions
1. REP
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REP MOVS destination, Source
This (Repeat) instruction converts any string primitive instruction into a re-executing loop. It specifies a
termination condition which causes the string primitive instruction to continue executing until the
termination condition is met. REP is used in conjunction with the MOVS and STOS instructions.
Example:
REP MOVS CL, AL
The other Repeat instructions are:
REPE - Repeat while Equal
REPZ - Repeat while zero
REPNE - Repeat while Not Equal
REPNZ - Repeat while Not Zero
The above instructions are used with the CMPS and SCAS instructions.
Example:
REPE CMPS destination, source
REPNE SCAS destination
2. MOVS
MOVS destination - string, source-string
This (Move String) instruction transfers a byte/word from the source string (addressed by SI) to the
destination string (addressed by DI) and updates SI and DI to point to the next string element.
(DEST) ← (SRC)
Example:
MOVS Buffer 1, Buffer 2
3. CMPS
CMPS destination-string, source-string
This (Compare String) instruction subtracts the destination byte/word (addressed by
DI) from the source byte/word (addressed by SI). It affects the flags but does not affect the
operands. -.
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Example:
CMPS Buffer 1, Buffer 2
4. SCAS
SCAS destination-string
• This (Scan String) instruction subtracts the destination string element (addressed by DI) from the
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contents of AL or AX and updates the flags.
• ‘The contents of destination string or accumulator are not altered.
• After each operation, DI is updated to point to the next string element
Example:
SCAS Buffer
5. LODS
LODS source-string
This (Load String) instruction transfers the byte/word string element addressed by SI to register AL or
AX and updates SI to point to the next element in the string.
(DEST)←(SRC)
Example:
LODSB
nam
e LODSW
name
6. STOS
STOS destination - string
This (Store String) instruction transfers a byte/word from register AL or AX to the string element
addressed by DI and updates DI to point to the next location in the string.
(DEST) ← (SRC)
Example: STOS display
Program Transfer Instructions
Unconditional instructions : CALL, RET, JMP
Conditional instructions : JC, JZ, JA
Iteration control instructions : LOOP, JCXZ
Interrupt instructions : INT, INTO, IRET
1. CALL
• CALL procedure - name
• This (CALL) instruction is used to transfer execution to a subprogram or procedure.
• RET (return) instruction is used to go back to the main program.
• There are two basic types of CALL : NEAR and FAR
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Intra-Segment CALL:
• A NEAR-CALL is a call to a procedure which is in the same code segment as the CALL instruction.
• When 8086 executes a NEAR-CALL instruction, it decrements the stack pointer (SP) by 2 and copies
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the offset of the next instruction after the CALL on the stack.
• It loads IP with the offset of the first instruction of the procedure in same segment.
• This NEAR-CALL is known as Intra-segment CALL.
Inter-Segment CALL:
• A FAR-CALL is a call to a procedure which is in a different segment from that which contains the
CALL instruction.
• When 8086 executes a FAR-CALL, it decrements the SP by 2 and copies the contents of the CS register
to the stack.
• It then decrements SP by 2 again and copies the offset of the instruction after the CALL to the stack.
• Finally it loads CS with the segment base of the segment which contains the procedure and IP with the
offset of the first instruction of the procedure in that segment.
• This FAR-CALL is known as Inter-segment CALL.
Example:
CALL NEAR
CALL AX
2. RET
This (Return) instruction will return execution from a procedure to the next instruction after the CALL
instruction in the main program.
If intra-segment, IP is popped off the stack; SP =SP+2 If
inter-segment, CS is popped off the stack; SP = SP+2
IP is popped off the stack; SP=SP+2
If optional POP value is used, then SP= SP + value.
Example:
RET
RET 6
3. JMP
JMP target
This (Jump) instruction unconditionally transfers control to the target location. The target operand
may be obtained from the instruction itself (direct JMP) or from memory or a register referenced by
the instruction (indirect JMP). A NEAR-JMP (Intra-segment) is a jump where destination location is in the
same code segment. In this case only IP is changed.
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IP = IP + signed displacement
A FAR-JMP (Inter-segment) is a jump where destination location is from a different segment. In this case
both IP and CS are changes as specified in the destination.
Example:
JMPBX
Conditional JMP
Instruction Operation
JC Jump if carry
JNC Jump if no carry
JZ Jump if Zero
JNZ Jump if not zero
JS Jump if sign or negative
JNS Jump if positive
JP/JPE Jump if parity/parity even
JNP/JPO Jump if not parity/odd parity
JO Jump if overflow
JNO Jump if no overflow
JA/JNBE Jump if above/not below or equal
JAE/JNB Jump if above or equal/not below
JB/JNAE Jump if below/not above or equal
JBE/JNA Jump if below or equal / not above
JG/JNLE Jump if greater/not less than nor equal
JGE/JNL Jump if greater or equal/not less than
JL/JNGE Jump if less/neither greater nor equal
JLE/JNG Jump if less than or equal / not greater
5. LOOP
LOOP label
This (Loop if CX not zero) instruction decrements CX by 1 and transfers control to the target operand if
CX is not zero. Otherwise the instruction following LOOP is executed.
If CX≠0, CX = CX - l
Prepared by M.K
IP = IP + displacement
If CX=0, then the next sequential instruction is executed.
Example:
LOOP again
6. LOOPE/LOOPZ
LOOPE/LOOPZ label
These (LOOP while Equal/Loop while Zero) are different mnemonics for the
same instruction.
If CX≠0, CX=CX-1 and control is transferred '.o the target operand If CX = 0, then next sequential
instruction is executed. Example:
LOOPE again
7. LOOPNE/LOOPNZ
LOOPNE Label
These (LOOP while Not Equal/LOOP while Not Zero) are different mnemonics for the same
instruction. CX is decremented by 1 and control is transferred to target operand if CX is not zero and if
ZF=0; otherwise the next sequential instruction is executed.
Example:
LOOPNE again
8. JCXZ
JCXZ Label
This (Jump if CX register Zero) instruction transfers control to the target operand if CX=0. It is useful at
the beginning of a loop to bypass the loop if CX=0.
Example:
JCXZ again
9. INT
INT interrupt type (0-255)
This (Interrupt) instruction activates the interrupt procedure specified by the interrupt-type number
(0- 255). The address of the interrupt pointer is calculated by multiplying the interrupt-type number by 4.
Example :
INT 7, INT 180
Prepared by M.K
10. INTO
This (Interrupt on Overflow) instruction generates a software interrupt if the
overflow flag is set.
Otherwise, control proceeds to the following instruction without activating an
interrupt procedure.
11. IRET
This (Interrupt on Return) instruction transfers control back to the point of
interruption by popping IP, CS and the flags from the stack.
✓ The 8086 does a no operation (NOP) for the ESC instruction other
than to access a memory operand and place it on the bus.
5. NOP
This (No operation) instruction causes the CPU to do nothing. NOP does not affect
any flags.