AssignmentInformation-ConvolutionEncoder
AssignmentInformation-ConvolutionEncoder
This exercise is to solidify and deepen your understanding of model-based design methodologies
through a practical design and implementation of a convolution encoder which is widely used in
today’s wireless communication systems. The recommended convolution encoder in this
assignment is based on IEEE standard, which is adopted by many wireless communication
standards. It also provides an opportunity to test your ability of solving the real FPGA design
problem and working in a team. At the end of the exercise, you should be confident in designing
other digital systems.
Background knowledge:
Requirements/Tasks:
1. From the specification of the convolutional encoder, Polynomial or Octal number, in the
standards, derive the circuit and select required components. Justify your decision.
Build the Simulink model to prove the functional design. Justify how your design meets
the requirement.
Implement your design on FPGA hardware. Verify the design via Hardware in the loop
method.
3. Synthesis the design using Xilinx Vivado design tool and analyse/discuss the resources
used and speed impact. Evaluate its performance including the environmental and
societal impact.
Identify the critical path in your design. Discuss the potential techniques which can be
used to improve the design to meet the requirement and it’s the drawback, if the speed
did not meet the requirement.
4. Write VHDL code to implement the Convolutional encoder. Use the same binary input
from Simulink and compare the results with that obtained in the model-based design.
Challenge: create your own components using BlackBox in System Generator for DSP to replace
the components from library. Re-implement your design and prove the results.
Suggestions:
Report:
You are required to submit a group report describing how you met the design requirements and
discussing the simulated results by the deadline set in the assignment briefing sheet. Each member
must be indicated their contribution clearly. Each group should have a coordinator or group leader,
and group member should have different tasks. Each group should have 3 – 4 members.
Your report must be typed. You must use IEEE standard two column publication format as used in
their Journals. The template for the publication can be found from IEEE journal’s websites. Your
report should be well organised and concise, and no more than five pages excluding appendix.
In the report you must clearly show all the design process. All design decisions must be fully
explained and justified. Details of marking scheme can be found in the Assignment Briefing Sheet.
References:
[1]. https://www.youtube.com/watch?v=o_iKfGlxwXw
[2]. https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9363693
[3]. IEEE Xplore Full-Text PDF: