DEPARTMENT OF ELECTRONICS &

COMMUNICATION ENGINEERING

SIMULATIONB LAB MANUAL

(EC-708)

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 LIST OF EXPERIMENTS
(EC 708) SIMULATION LAB
1 Introduction to Microwind and Analysis of CMOS
0.25 micron Technology MOSFETs

2 Design and simulate a CMOS inverter

3 Design and simulate Universal Logic gates using

CMOS logic

4 Design and simulate AND & OR gate using CMOS

logic

5 Design and simulate 3 i/p NAND & NOR gate

6 Design and simulate XOR & XNOR gate using

CMOS logic

7 Design and simulate a function F=(A+BC)' using

CMOS logic

8 Design and simulate Half adder using CMOS logic

9 Design and simulate Full adder using CMOS logic

10 Design and simulate 2:1 MUX using CMOS logic

 Experiment- 1
Aim: Introduction to Microwind and Analysis of CMOS 0.25 micron
Technology MOSFETs.

Tool used: Microwind version 3.1

Lab Description:

MOSFET

The Metal Oxide Semiconductor Field Effect Transistor is very important part of

Digital Integrated Circuits. It is mostly used as switch in digital design. MOSFET

is a four terminal device. The voltage applied to the gate terminal determine the
current flow between drain and source terminals. The body/substrate of the
transistor is the fourth terminal. Mostly the fourth terminal (body/substrate) of
the device is connected to dc supply that is identical for all devices of the same
type (GND for nMOS and Vdd for pMOS). Usually this terminal is not shown on
the schematics.

nMOS

The nMOS transistor consists of n+ drain and source diffusion regions, which are
embedded in a p-type substrate. The electrons in the channel beneath the gate
between source and drain terminal are responsible for the current flow.
pMOS

The pMOS transistor consists of p+ drain and source diffusion regions, which are
embedded in an n-type substrate. The holes in the channel beneath the gate
between source and drain terminal are responsible for the current flow.
CMOS

The CMOS (Complementary MOS) consist of both p-type and n-type MOS. The

advantage of CMOS is its low power design due its Static behavior.

Design/ Diagram/Circuit
Lab Instructions

a) Open the Microwind2 by double clicking it located in the installed directory of

microwind2-7

The following screen will be appeared

b) Select the foundry using the command File > Select Foundry
c) Select 0.25-micron process by selecting “ cmos025.tec” file. Click Open tab
to continue

d) Save the design as “ Lab01” using the command File > Save as.

e) Create an nMOS by using the nMOS generator button in the Palette

You can set the width and length of MOS by typing in the fields Width MOS
and Length MOS either in micron or in lambda units as indicated in the above
figure.Click on Generate Device Tab to generate the device

f) Apply the voltages and output node using the symbol buttons Vdd, Gnd, Add
a Pulse, and Visible node in the Palette menu, as indicated in the following
figure.

You can use the Stretch/Move command button for these actions.
g) Click on the Run Tab on the Tool bar menu to start the simulation or using the

command Simulate > Run Simulation

h) Now apply the Vdd to the n+ diffusion or drain terminal instead of Vss, run
the simulation again.
Analyze the simulation waveform, use different values of voltages for Vdd by
double clicking on it and set the voltage level. Now we will make the above
schematics.
Similarly the nMOS can be analyzed using different widths and different input

voltages.

j) Save the design.

The characteristics of the pMOS are similar to the nMOS. Design the pMOS
Layout and analyzed in the similar way as nMOS.
Explore the Simulation Graphs.
Explore different device parameters and the commands in the drop down
 Experiment- 2
Aim: Design and simulate a CMOS inverter

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1

Theory: An inverter, performs the operation of inversion. It produces a logic 1

as the output when the input is logic 0, and vice versa. The symbol of an inverter
is similar to that of a buffer, with a bubble at its pointed end to represent the
inversion. Inverters are fundamental components used to perform logical
operations in digital circuits.

Steps:
1. Open Microwind and select the foundry cmos025.
2. Draw the layout of nMOS using MOS Generator
4. Draw the layout of pMOS using MOS Generator.
5. Connect the two transistors using Metal 1 as per design.
6. Draw the rails of VDD and ground rails above and below.
7. Connect the nWell to VDD .
8. Check the design using DRC for any design rule violation and correct the
design in case of error, again run the DRC and check for errors.
9. Check for Electrical connections to be valid.
10. Simulate the Design.
 Fig.1 Inverter Layout

Fig. 2 Inverter Waveform

 Experiment- 3
Aim: Design and simulate Universal Logic gates using CMOS logic

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind version 3.1

Theory:

(a) NAND GATE: The NAND gate is an essential logic component widely used
in digital circuits to perform logical operations. Its behavior is such that the output
is high (1) if at least one of the inputs is low (0). However, when both inputs are
high (1), the output becomes low (0). This distinct characteristic makes the
NAND gate an essential building block in the design and implementation of
various digital systems.

(b) NOR GATE: The NOR gate is an essential logic component in digital
circuits, performing a combination of OR and NOT operations. Its functionality
is such that the output is high (1) only when all inputs are low (0). If any of the
inputs is high (1), the output becomes low (0). This unique behavior makes the
NOR gate a fundamental building block in the design of digital systems.
Steps:

1. Design the layout of 2- Input NAND Gate.

2: Simulate the Design.
3: Design the layout of 2- Input NOR Gate
4: Simulate the Design.

Fig 1. Layout of 2- Input NAND GATE

Fig.2 Waveform of 2-input NAND GATE

Fig.3. Layout of 2- Input NOR Gate

Fig.4. Waveform of 2-Input NOR GATE
 Experiment- 4
Aim: Design and simulate AND & OR gate using CMOS logic.

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1.

Theory:

(a) AND GATE: The AND gate is a fundamental logic component in digital
circuits used to perform logical operations. Its behavior is such that the
output is high (1) only when all inputs are high (1). If any input is low (0),
the output becomes low (0). This characteristic makes the AND gate a key
element in the design and implementation of digital systems.

(b) OR GATE: The OR gate is a basic logic component in digital circuits

used to perform logical operations. Its behavior is such that the output is
high (1) if at least one of the inputs is high (1). The output is low (0) only
when all inputs are low (0). This functionality makes the OR gate an
essential building block in the design of digital systems.
Steps:

1. Design the layout of 2- Input AND Gate

2. Simulate the Design.
3. Design the layout of 2- Input OR Gate
4. Simulate the Design.

Fig.1. Layout of 2- Input AND Gate

Fig.2. Waveform of 2- Input AND Gate

Fig.3. Layout of 2- Input OR Gate

Fig.4. Waveform of 2- Input OR Gate
 Experiment- 5
Aim: Design and simulate 3 i/p NAND & NOR gate

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind version 3.1

Theory:

(a) 3 i/p NAND GATE: The NAND gate is an essential logic component widely
used in digital circuits to perform logical operations. Its behavior is such that the
output is high (1) if at least one of the inputs is low (0). However, when both
inputs are high (1), the output becomes low (0). This distinct characteristic makes
the NAND gate an essential building block in the design and implementation of
various digital systems.
(b) 3 i/p NOR GATE: The NOR gate is an essential logic component in digital
circuits, performing a combination of OR and NOT operations. Its functionality
is such that the output is high (1) only when all inputs are low (0). If any of the
inputs is high (1), the output becomes low (0). This unique behavior makes the
NOR gate a fundamental building block in the design of digital systems.

Steps:

1. Design the layout of 3- Input NAND Gate.

2: Simulate the Design.
3: Design the layout of 3- Input NOR Gate
4: Simulate the Design.

Fig 1. Layout of 3- Input NAND GATE

Fig.2 Waveform of 3-input NAND GATE

 Fig.3. Layout of 3- Input NOR Gate

Fig.4. Waveform of 3-Input NOR GATE

 Experiment- 6
Aim: Design and simulate XOR & XNOR gate using CMOS logic.

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1.

Theory:

(a) XOR GATE: The XOR (Exclusive OR) gate is a critical logic component
in digital circuits, used to perform a unique logical operation. Its behavior
is such that the output is high (1) if and only if the inputs are different,
meaning one input is high (1) and the other is low (0). Conversely, the
output is low (0) when both inputs are the same, either both high (1) or
both low (0). This distinctive functionality makes the XOR gate a vital
element in various digital applications.

(b) XNOR GATE: The XNOR (Exclusive NOR) gate is a fundamental logic
component in digital circuits, used to perform a complementary operation
to the XOR gate. Its behavior is such that the output is high (1) when the
inputs are the same, either both high (1) or both low (0). Conversely, the
output is low (0) when the inputs are different, meaning one input is high
(1) and the other is low (0). This characteristic makes the XNOR gate a
key element in digital logic design, particularly in equality detection and
error-checking circuits.
Steps:

1. Design of XOR and XNOR Gates.

2. Layout Design using the tool.
3. Simulate the Design and observe.

Fig.1. Layout of XOR GATE

Fig.2. Waveform of XOR GATE

Fig.3. Layout of XNOR GATE

Fig.4. Waveform of XNOR GATE
 Experiment- 7
Aim: Design and simulate a function F=(A+BC)' using CMOS logic

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1.

Theory:

A B C F
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

Steps:

1. Implement the function using CMOS logic.

2. Design layout using Microwind.
3. Simulate the Design and observe.
 Experiment- 8
Aim: Design and simulate Half adder using CMOS logic

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1

Theory:

A half adder is a simple combinational logic circuit used to perform the addition
of two single-bit binary numbers. It generates two outputs: the sum, which is the
result of the addition, and the carry, which indicates if a carry-out is generated.
The half adder does not account for carry-in from a previous stage, making it
suitable for the addition of only two bits. It is a fundamental building block in
digital circuits and serves as the basis for designing more complex adders like the
full adder.
Steps :

1. Design of CMOS Half Adder layout.

2. Layout Design using the tool.

Fig.1. Layout of Half Adder

Fig.2. Waveform of Half Adder

 Experiment- 9
Aim : Design and simulate full adder using CMOS logic.

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1.
Theory: A full adder is a combinational logic circuit used to perform the addition
of three binary bits: two input bits and a carry-in bit. It produces two outputs: the
sum and the carry-out. The sum output represents the result of the addition, while
the carry-out indicates whether a carry is generated that needs to be added to the
next higher bit in multi-bit binary addition. The full adder is a fundamental
building block in the design of arithmetic circuits, including adders for multi-bit
binary numbers.
Steps :

1. Design of CMOS Full Adder layout.

2. Layout Design using the tool.

Fig.1. Layout of FULL Adder

Fig.2. Waveform of FULL Adder

 Experiment- 10
Aim: Design and simulate 2:1 MUX using CMOS logic.

Tools Required:

1. Operating System: Windows 10 Pro

2. Software: Microwind Version 3.1

Theory: A 2:1 multiplexer (MUX) is a combinational logic circuit used to select

one of two input signals based on a control or selection signal. It has two data
inputs, one control input, and one output. The control input determines which of
the two data inputs is passed to the output. If the control input is 0, the first data
input is selected and sent to the output. If the control input is 1, the second data
input is selected. The 2:1 MUX is widely used in digital systems for routing data,
making it a fundamental building block in various applications like data selection,
switching, and multiplexing.
 Fig.1. Layout of 2:1 MUX

Fig.2. Waveform of 2:1 MUX