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CISC & RISC

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The document discusses microprocessors, their characteristics, and the differences between RISC, CISC, and EPIC architectures. RISC processors use a simplified instruction set for faster execution and lower power consumption, while CISC processors offer a rich instruction set for compact code but may have slower performance. EPIC combines features of both RISC and CISC to enhance processing efficiency through parallel instruction execution.

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0% found this document useful (0 votes)
2 views4 pages

CISC & RISC

Uploaded by

knsfamily666
The document discusses microprocessors, their characteristics, and the differences between RISC, CISC, and EPIC architectures. RISC processors use a simplified instruction set for faster execution and lower power consumption, while CISC processors offer a rich instruction set for compact code but may have slower performance. EPIC combines features of both RISC and CISC to enhance processing efficiency through parallel instruction execution.

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© All Rights Reserved

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The microprocessor is a processing unit on the single chip.

It is the integrated circuit that


performs the core functions of the computer CPU. It is the multipurpose programmable silicon
chip constructed using a Metal Oxide Semiconductor (MOS) technology which is clock driven
and register based. It accepts a binary data as a input and provides output after processing it as
per a specification of instructions stored in a memory. These microprocessors are capable of
the processing the 128 bits at the time at the speed of a one billion instructions per second.

Characteristics of a Microprocessor

1. Instruction Set: The set of complete instructions that the microprocessor executes is termed
the instruction set.

2. Word Length: The number of bits processed in a single instruction is called word length or
word size. The Greater the word size is the larger the processing power of the CPU.

3. System Clock Speed: A Clock speed determines how fast the single instruction can be
executed in the processor. The microprocessor is controlled by the System Clock. A Clock
speeds are generally measured in the millions of a cycles per second (MHz) and thousand
million cycles per second GHz. A Clock speed is considered to be the very important aspect of
predicting a performance of the processor.

What is Reduced Instruction Set Computer (RISC)?

It stands for Reduced Instruction Set Computer. It is a type of microprocessor architecture that
uses a small set of instructions of uniform length. These are simple instructions that are
generally executed in one clock cycle. RISC chips are relatively simple to design and inexpensive.
The setback of this design is that the computer has to repeatedly perform simple operations to
execute a larger program having a large number of processing operations.
Examples: SPARC, POWER PC, etc.

Advantages of Reduced Instruction Set Computer (RISC)

 Faster execution speed RISC processors use the simpler instructions that can be
executed more quickly leading to improved overall performance in the many tasks.

 Lower power consumption the simpler design of a RISC processors often results in the
lower power usage making them the ideal for mobile devices and energy efficient
computing.

 Easier to design and manufacture RISC processors have a simpler architecture which can
make them the easier and potentially cheaper to design and produce.

Disadvantages of Reduced Instruction Set Computer (RISC)


 Larger code size RISC processors often require more lines of code to perform complex
tasks, which can lead to larger program sizes and increased memory usage.

 More work for compilers the simpler instruction set means compilers for RISC
processors need to do more work to translate high-level programming languages into
machine code.

 Limited built-in functionality RISC processors have fewer complex instructions built into
hardware, which can make certain specialized tasks less efficient without additional
software support.

What is Complex Instruction Set Computer (CISC)?

It stands for Complex Instruction Set Computer. These processors offer the users, hundreds of
instructions of variable sizes. CISC architecture includes a complete set of special-purpose
circuits that carry out these instructions at a very high speed. These instructions interact with
memory by using complex addressing modes. CISC processors reduce the program size and
hence lesser number of memory cycles are required to execute the programs. This increases
the overall speed of execution.
Examples: Intel architecture, AMD

Advantages of Complex Instruction Set Computer (CISC)

 Smaller code size CISC processors can perform complex operations with single
instructions, often resulting in more compact code and reduced memory usage.

 Rich instruction set the diverse set of complex instructions can make programming
easier and more intuitive for certain tasks, especially in assembly language.

 Backwards compatibility CISC architectures, like x86, often maintain compatibility with
older software, making system upgrades easier for users and businesses.

Disadvantages of Complex Instruction Set Computer (CISC)

 Slower execution speed Complex instructions typically take longer to execute,


potentially resulting in slower overall performance compared to RISC processors.

 Higher power consumption the more complex hardware required for the CISC
processors often leads to an increased power usage making them less suitable for the
mobile devices.

 More complex hardware designs a CISC processors require more complex circuitry to
handle their varied the instructions which can make them a more challenging and
expensive to design and manufacture.
What is EPIC?

It stands for Explicitly Parallel Instruction Computing. The best features of RISC and CISC
processors are combined in the architecture. It implements parallel processing of instructions
rather than using fixed-length instructions. The working of EPIC processors is supported by
using a set of complex instructions that contain both basic instructions as well as the
information of execution of parallel instructions. It substantially increases the efficiency of
these processors.

Difference between RISC and CISC processor

CISC RISC

A large number of a instructions are Very few instructions are present. The number
present in the architecture. of instructions is generally less than 100.

No instruction with a long execution time due


Some instructions with long execution
to a very simple instruction set. Some early
times. These include instructions that
RISC machines did not even have an integer
copy an entire block from one part of
multiply instruction, requiring compilers to
memory to another and others that copy
implement multiplication as a sequence of
multiple registers to and from memory.
additions.

Variable-length encodings of the Fixed-length encodings of the instructions are


instructions. used.
Example: IA32 instruction size can range Example: In IA32, generally all instructions are
from 1 to 15 bytes. encoded as 4 bytes.

Multiple formats are supported for


specifying operands. A memory operand
Simple addressing formats are supported. Only
specifier can have many different
base and displacement addressing is allowed.
combinations of displacement, base, and
index register.

CISC supports array. RISC does not support an array.


Arithmetic and logical operations only use
Arithmetic and logical operations can be register operands. Memory referencing is only
applied to both memory and register allowed by loading and storing instructions, i.e.
operands. reading from memory into a register and
writing from a register to memory respectively.

Implementation programs are hidden


Implementation programs exposed to
from machine-level programs. The ISA
machine-level programs. Few RISC machines
provides a clean abstraction between
do not allow specific instruction sequences.
programs and how they get executed.

Condition codes are used. No condition codes are used.

Registers are being used for procedure


The stack is being used for procedure arguments and return addresses. Memory
arguments and returns addresses. references can be avoided by some
procedures.

Successful pipeline with one instruction


Unsuccessful pipeline
per cycle

Heavy use of RAM More efficient use of RAM

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