Module 2

Introduction to
AVR ATMega32
Architecture
Plastic
Chip case

Pins
Processor Architecture &
Organization
Architecture
attributes of a system visible to a
programmer
these attributes have a direct impact on
the logical execution of a program
Instruction set, number of bits used for
data representation, I/O mechanisms,
addressing techniques
Design issue: whether a computer will
have a specific instruction.
e.g. Is there a multiply instruction?
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Processor Architecture &
Organization
Organization
the operational units and their
interconnections that realize the
architectural specifications
(how features are implemented)
hardware details that are transparent to
the programmers
Control signals, interfaces, memory
technology
Design issue: how this instruction is to be
implemented.
Is there a hardware multiply unit or is it
done by repeated
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addition? Module 2/3
Processor Architecture &
Organization
Many computer manufacturers offer a family of
computer models, all with the same
architecture but with differences in
organization.
This gives code compatibility (at least backwards)
All Intel x86 family share the same basic
architecture
The IBM System/370 family share the same
basic architecture
An architecture may survive many years, but its
organization changes with the changing
technology.
E.g. the IBM Systems/370
20112012-I architecture, with few
Module 2/4
Introduction to Atmel AVR
Atmel Corporation is a manufacturer of
semiconductors, founded in 1984.

Atmel introduced the first 8-bit flash microcontroller in

1993, based on the 8051 core.

In 1996, a design office was started in Trondheim,

Norway, to work on the AVR series of products.

Its products include microcontrollers (including 8051

derivatives and AT91SAM and AT91CAP ARM-based
micros), and its own Atmel AVR and AVR32 architectures.

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Introduction to Atmel AVR
The AVR architecture was conceived by two students at the
Norwegian Institute of Technology (NTH) Alf-Egil Bogen and
Vegard Wollan.
The AVR is a modified Harvard architecture 8-bit RISC single
chip microcontroller which was developed by Atmel in 1996.
The AVR was one of the first microcontroller families to use
on-chip flash memory for program storage, as opposed to one-
time programmable ROM, EPROM, or EEPROM used by other
microcontrollers at the time.
The AVR is a modified Harvard architecture machine where
program and data is stored in separate physical memory
systems that appear in different address spaces, but having
the ability to read data items from program memory using
special instructions.
Atmel says that the name AVR is not an acronym and does not
stand for anything 20112012-I
in particular. The creators Module
of the2/6
AVR give
 Von Neumann vs. Harvard
architecture
Data bus Data bus
Code Data
Memory Address bus CPU Address bus Memory
Control bus Control bus

Harvard architecture

Code Data
Memory Memory

Data bus
CPU Address bus
Control bus

Von Neumann architecture

Processor ISA: RISC versus CISC
CISC RISC
Emphasis on hardware Emphasis on software
Include multi-clock complex Include single-clock reduce
instructions instruction only
Memory-to-memory: Load and Register-to-register: Load and
Store incorporated in instructions Store are independent instructions
Small code sizes, high cycles per Low cycles per second, large code
second sizes
Transistors used for storing complex Spends more transistors on memory
instructions registers
RISC vs. CISC is a topic quite popular on the Net. Every time Intel (CISC)
or Apple (RISC) introduces a new CPU, the topic pops up again.
Most PC's use CPU based on CISC architecture. For instance Intel and
AMD CPU's are based on CISC architectures.
Many claim that RICS is the architecture of the future.
But even though RISC has been in the market since 1980, it hasnt
managed to kick CISC out of the picture, some argue that if it is really
the architecture of the future it should have been able to do this by now.
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AVR different groups

Classic AVR
e.g. AT90S2313, AT90S4433
Mega
e.g. ATmega8, ATmega32, ATmega128
Tiny
e.g. ATtiny13, ATtiny25
Special Purpose AVR
e.g. AT90PWM216,AT90USB1287
Lets get familiar with the AVR part
numbers
ATmega128

Atmel group
Flash
=128K

ATtiny44 AT90S4433

Atmel
Tiny Flash =4K Atmel Classi
Flash =4K
group c
group

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ATMega32 Pin out & Descriptions

Clears all B
Port
the
Provides
Port A
registers
supply voltage Reference
These
and
to pins
the areIt
restart
chip. voltagevoltage
for
Supply
used
thetobe
should forADC
ADC and
connect ofto
execution
connected portA.
external
program
+5 Connect it to
crystal or RC
VCC
oscillator
Port C
Port D

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ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions
Digital IO is the most fundamental mode of connecting a MCU to
external world. The interface is done using what is called a
PORT. A port is the point where internal data from MCU
chip comes out or external data goes in. They are present is
form of PINs of the IC. Most of the PINs are dedicated to this
function and other pins are used for power supply, clock source
etc . ATMega32 ports are named PORTA, PORTB, PORTC, and
PORTD.

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20112012-I Module 2/15
ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions

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ATMega32 Pin out & Descriptions
Defining a pin as either Input or Output The
DDRx Registers

LDI R20,0xFF ;R20 = 0b01110101 (binary)

OUT PORTx,R20 ;PORTA = R20
OUT DDRx,R20 ;DDRA = R20

DDRx = 0b01110101; /* Configuring I/O

pins of portb */

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ATMega32 Pin out & Descriptions
Case 1 : To make a pin go high or low ( if it is an output pin)-
Data Register PORTx

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ATMega32 Pin out & Descriptions
Pull-up resistors are used in electronic logic circuits to
ensure that inputs to logic systems settle at expected
logic levels if external devices are disconnected or
high-impedance

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ATMega32 Pin out & Descriptions
Case 2 : To activate / Deactivate pull up resistors-Data Register
PORTx

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ATMega32 Pin out & Descriptions
The PINx register gets the reading from the input
pins of the MCU

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AVR Architecture

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ATMega32 Architecture
Native data size is 8
bits (1 byte).
Uses 16-bit data
addressing allowing
it to address 216 =
65536 unique
addresses.
Has three separate
on-chip memories
2KB SRAM
8 bits wide
used to
store data
1KB EEPROM
8 bits wide
used for
persistent
data
storage
32KB Flash
16 bits wide
used to
store 20112012-I Module 2/24
program
ATMega32 Programmer Model:
Memory
1. 2KB SRAM
For temporary data storage
Memory is lost when power
is shut off (volatile)
Fast read and write

2. 1KB EEPROM
For persistent data storage
Memory contents are
retained when power is off
(non-volatile)
Fast read; slow write
Can write individual bytes

3. 32KB Flash Program

Memory
Used to store program code
Memory contents retained
when power is off (non-
volatile)
Fast to read; slow to write
Can only write entire
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blocks of memory at a
ATMega32 Programmer Model:
Memory
AVR microcontrollers are Harvard
architecture. This means, that in this
architecture are separate memory
types (program memory and data
memory) connected with distinct
buses. Such memory architecture
allows processor to access program
memory and data memory at the
same time. This increases
performance of MCU comparing to
CISC architecture, where CPU uses
same bus for accessing program
memory and data memory.
Type Flash RAM EEPROM
F_END type
Each memory Size,
haskB itsRAMEND
own Size, kB E_END Size, kB
address space:
Atmega8 $0FFF 8 $045F 1 $1FF 0.5
Atmega3 $3FFF 32 $085F 2 $3FF 1
2
Atmega64 $7FFF 64 $10FF 4 $7FF 2
Atmega12 $FFFF 128
20112012-I $10FF 4 $FFF 2/26
Module 4
8
ATMega32 Programmer Model:
Program Memory
Flash Memory
Layout

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ATMega32 Programmer Model: Data
Memory
EEPROM
ATmega32 contains 1024 bytes of data
EEPROM memory.
It is organized as a separate data space, in
which single bytes can be read and written.
The EEPROM has an endurance of at least
100,000 write/erase cycles.
Different
Chip chip
Byteshave
Chip different size
Bytes Chip of EEPROM
Bytes
memory
ATmega8 512 ATmega16 512 ATmega32 1024
ATmega64 2048 ATmega128 4096 ATmega256 4096
RZ
ATmega640 4096 ATmega1280 4096 ATmega2560 4096
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ATMega32 Programmer Model: Data
Memory
The data memory is
composed of three parts:
GPRs (general
purpose registers),

Special Function
Registers (SFRs),
and

Internal data
SRAM.

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ATMega32 Programmer Model:
Internal SRAM
Internal data SRAM is widely used for storing data and
parameters by AVR programmers and C compilers.

Each location of the SRAM can be accessed directly

by its address.

Each location is 8 bit wide and can be used to store

any data we want.

Size of SRAM is vary from chip to chip, even among

members of the same family.

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ATMega32 Programmer Model:
Registers

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ATMega32 Programmer Model:
Registers (GPRs)
The fast-access
Register file contains
32 x 8-bit general
purpose working
registers with a single
clock cycle access
time. This allows
single-cycle
Arithmetic Logic Unit
(ALU) operation. In a
typical ALU operation,
two operands are
output from the
Register file, the
operation is executed,20112012-I Module 2/32
ATMega32 Programmer Model:
Registers (GPRs)
Six of the 32 registers
can be used as three
16-bit indirect address
register pointers for
Data Space addressing
enabling efficient
address calculations.
One of the these
address pointers can
also be used as an
address pointer for look
up tables in Flash
Program memory.
These
added function
registers are the 16-bit
X-register, Y-register
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ATMega32 Programmer Model:
Registers (GPRs)
The R26..R31 registers have some added functions to
their general purpose usage. These registers are 16-bit
address pointers for indirect addressing of the Data
Space. The three indirect address registers X, Y, and Z
are shown above.
In the different addressing modes these address
registers have functions as fixed displacement,
automatic increment, and automatic decrement

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ATMega32 Programmer Model: I/O
Registers (SFRs)
Address Address Address
The I/O memory is dedicated to Name Name Name
I/O Mem. I/O Mem. I/O Mem.
specific functions such as status $00 $20 TWBR $16 $36 PINB $2B $4B OCR1AH
register, timers, serial $01 $21 TWSR $17 $37 DDRB $2C $4C TCNT1L
$18 $38 PORTB
communication, I/O ports, ADC $02 $22 TWAR $2D $4D TCNT1H
$03 $23 TWDR $19 $39 PINA $2E $4E TCCR1B
and etc. $04 $24 ADCL $1A $3A DDRA $2F $4F TCCR1A
$05 $25 ADCH $1B $3B PORTA $30 $50 SFIOR
Function of each I/O memory $06 $26 ADCSRA $1C $3C EECR OCDR
$31 $51
location is fixed by the CPU $07 $27 ADMUX $1D $3D EEDR OSCCAL
$08 $28 ACSR $1E $3E EEARL
designer at the time of design. $32 $52 TCNT0
$09 $29 UBRRL $1F $3F EEARH $33 $53 TCCR0
(because it is used for control of $0A $2A UCSRB UBRRC $34 $54 MCUCSR
the microcontroller and $0B $2B UCSRA
$20 $40
UBRRH $35 $55 MCUCR
peripherals) $0C $2C UDR $21 $41 WDTCR $36 $56 TWCR
$0D $2D SPCR $22 $42 ASSR $37 $57 SPMCR
AVR I/O memory is made of 8 bit $0E $2E SPSR $23 $43 OCR2 $38 $58 TIFR
$0F $2F SPDR $24 $44 TCNT2 $39 $59 TIMSK
registers. $10 $30 PIND $25 $45 TCCR2 $3A $5A GIFR
$11 $31 DDRD $26 $46 ICR1L $3B $5B GICR
All of the AVRs have at least 64 $12 $32 PORTD $27 $47 ICR1H $3C $5C OCR0
bytes of I/O memory location. $13 $33 PINC $28 $48 OCR1BL $3D $5D SPL
(This 64 bytes section is called $14 $34 DDRC $29 $49 OCR1BH $3E $5E SPH
$15 $35 PORTC
standard I/O memory) $2A $4A OCR1AL $3E $5E SREG

In other microcontrollers, the I/O

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registers are called SFRs (Special
ATMega32 Programmer Model:
Registers (SP)

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ATMega32 Programmer Model:
Registers (SP)

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ATMega32 Programmer Model:
Registers (PC)

Program counter (PC, 16-bit)

Holds address of next program

instruction to be executed

Automatically incremented when the

ALU executes an instruction

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ATMega32 Programmer Model:
Registers (SR)

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ATMega32 Programmer Model:
Registers (SR)

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ATMega32 Programmer Model:
Registers (SR)

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ATMega32 Programmer Model:
Registers (SR)

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ATMega32 Programmer Model:
Registers (SR)

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ATMega32 Programmer Model:
Registers (SR)
SREG: I T H S V N Z C
Carry
Interrupt oVerflow Zero
Temporary Negative
Sign
Half carry N+V
Example:Show
Example:
Example:
Example: Showthe
Show
Show thestatus
the
the statusof
status
status ofthe
of
of theC,
the
the C,H,
C,
C, H,and
H,
H, andZZ
and
and ZZflags
flagsafter
flags
flags afterthe
after
after theaddition
the
the subtraction
subtraction
addition of of
of
of 0x9C
0x38
0x9C
0x23 from
from
0x730x64
and
and from
0x2F in 0x9C
in0xA5
0x52
the ininthe
thefollowing
the following
followingfollowing instructions:
instructions:
instructions:
instructions:
LDI R20,
LDI
LDI
LDI R20, 0x9C
R20,
R16, 0x9C
0xA5
0x52 ;R16 = 0x38
0x38
R0
ALU LDI R21,
LDI
LDI
LDI R21, 0x64
R21,
R17, 0x9C
0x23
0x73 R1;R17 = 0x2F
0x2F
R2
SUB R20,
SUB
ADD
ADD R20, R21
R20,
R16, R21
R21
R17 ;subtract
;subtract
;add
;add R21
R17 toR21
R21
to from R20
from
R20
R16 R20

SREG: Solution:
I T H S V N Z C
Solution:
Solution:
CPU
Solution:
Solution: R15
11
$52
$9C
$A5 0101 0010
10011100
1010 1100 R16
0101
$9C
$38
- 1001
0011
$73 1000
0111 0011
-- +$64
+ $9C
$23
$2F 10010100
0010
0110
0010 1100
R17
0011
1111
$DF
$00
$82 1101
0000
1000 1111R20
0000
0010 =R20
$DF== $82
R20 $00= 00
PC

$100
C = 1 because 1
$67 R21 0000
0110 0111 thanR20
0000
is bigger R20=
R16 0x67
and there is a borrow from D8 bit.
CCC===100because
becausethere
because R21 is
R21 is not
isnot
ahas bigger
bigger
carry than R20
than
beyond R20 andbit.
and
thethan
D7 there is
there is no
no borrow
borrow from
from D8
D8 bit.
bit.
Z
C = 0 because the R20 a value other zero after the subtraction.
H
Instruction ==
ZZ ==100 because
1decoder
because
because
there
because there
the R20
the R20 is has
is
nozero
carry
aaisR30
beyond
after
a value
carry from
the
the D3
other
the
D70 bit.
subtraction.
than theafter
toD3. the subtraction.
D4 bit.
H
H =
= 1
1 because
because there
there is
is a borrow
carry
R31 from
from D4
the D3 to to the D4 bit.
ZHH===100because
becausethe
because there
there
R20 is(the
is no
no borrow
borrow fromaD4
result) from
has D4 to D3.
to
value D3.
0 in it after the addition.
Z = 0 because
Instruction Register the R16 (the result) has a value other than 0 after the addition.
registers