8086 Microprocessor: Ram Murat Singh

8086 MICROPROCESSOR
RAM MURAT SINGH

MICROPROCESSOR 8086
• The 8086 was the first 16-bit microprocessor introduced by Intel in 1978.
• It is implemented in HMOS ( High density short channel MOS) technology.
• It is packaged in a 40-pin CERDIP or plastic package.
• It is available in three clock rates:
8086 in 5Mhz,
8086-2 in 8Mhz, and
8086-1 in 10Mhz.
• 8086 operates in both single processor and multiple processor
configuration to achieve high performance levels.
• It has 20-address bus and hence can access as much as 1MB(220) memory
locations.
• It has 16-bit data bus.
8086 INTERNAL BLOCK DIAGRAM
FUNCTIONAL BLOCK DIAGRAM OF 8086
8086 Microprocessor is divided into two

independent functional parts.
• Bus interface unit (BIU).
• Execution unit (EU).
BUS INTERFACE UNIT
• The bus interface unit handles all transfer of
data and addresses on the buses for the
Execution unit.
• This unit sends out addresses, fetches
instructions from memory, reads data from
ports and memory and writes data to ports
and memory.
DIFFERENT PARTS OF BIU
• SEGMENT REGISTERS
• INSTRUCTION POINTER
• THE QUEUE
SEGMENT REGISTERS
BIU contains four 16-bit segment registers as
follows:
• Code segment (CS) register.
• Stack segment (SS) register.
• Extra segment (ES) register.
• Data segment (DS) register.
FUNCTION OF SEGMENT REGISTERS
• In 8086 complete 1MB memory is divided into 16 logical segments.
• Each segment thus contains 64 KB of memory.
• While addressing any location in the memory bank, the Physical address is
calculated from two parts, the first part is Segment address, and the
second is Offset.
• The segment registers contain 16-bit segment base addresses related to

different segments.
• Thus the CS, DS, ES, SS segment registers, respectively contain the
segment addresses for the Code, Data, Extra and Stack segments.
• They may or may not be physical separated.
• Each segment register contains a 16-bit base address that points to the
lowest-addressed byte of that particular segment in memory.
GENERATION OF PHYSICAL ADDRESS
Segment address- 1005H

Offset address - 5555H
Segment address-1005H- 0001 0000 0000 0101
Shifted by 4-bit positions-0001 0000 0000 0101 0000
+
Offset address - 0101 0101 0101 0101
Physical address -0001 0101 0101 1010 0101
1 5 5 A 5
INSTRUCTION POINTER
• It is 16-bit register , which identifies the location
of the next word of instruction code that is to be
fetched in the current code segment.
• IP contains an offset instead of the actual address
of the next instruction.
• The 20-bit address produced after addition of the
offset stored in IP to segment base address in the
CS is called the Physical address of the code byte.
THE QUEUE
• The last section of BIU is the FIFO group of
registers called a queue. It is basically a group of
registers.
• This arrangement makes possible for the BIU to
fetch the instruction byte while EU is decoding
an instruction or executing an instruction which
does not require use of buses.
• This arrangement is called pipelining.
• This is done to speed up the program execution.
EXECUTION UNIT
• It tells the BIU where to fetch instructions or
data from.
• Decodes the instruction.
• Executes instructions.
DIFERENT PARTS OF EU
• ALU
• Decoder
• Control Circuitry
• General purpose registers
• Flag register
• Pointer and Index registers
ALU
The EU has 16-bit arithmetic and logic unit
which can add, subtract, AND, OR, XOR,
increment, decrement, complement, or shift
binary numbers.
DECODER
The decoder in the EU translates instruction
fetched from the memory into a series of
actions which the EU carries out.
CONTROL CIRCUITRY
• EU contains control circuitry which directs
internal operations.
• It also generates the necessary timing and
control signals.
VARIOUS REGISTERS IN EU
GENERAL PURPOSE DATA REGISTERS
• There are eight 8-bit general purpose registers

in 8086, labeled AH, AL, BH, BL, CH, CL, DH
and DL.
• These registers can be used individually for
temporary storage of 8-bit data.
• The AL register is also called the accumulator.
GENERAL PURPOSE DATA REGISTERS
• Certain pairs of these general purpose registers can be
used together to store 16-bit data words.
• The acceptable register pairs are AH and AL, BH and
BL, CH and CL, DH and DL.
• The AH-AL pair is called AX register, BH-BL pair is
called BX register, CH-CL pair is called CX register and
DH-DL pair is called DX register.
• Any of these registers can be used as the source or
destination of an operand during an arithmetic and
logical operation.
FLAG REGISTER
• It is a 16-bit status register within the EU of
8086.
• There are nine flags in 8086.
• Six of these are status flags and three are
control flags.
8086 FLAG REGISTER
STATUS FLAGS
• CF- It is set to 1 if carry out of MSB.
• PF- It is set to 1 if result has even parity.
• AF- Used for BCD.
• ZF- It is set to 1 if result is 0.
• SF- It is set to 1 if result is negative.
• OF- It is set to 1 if signed result is out of the
range.
CONTROL FLAGS
• TF- It is set if single step mode(debugging).
• IF- If set, interrupt request at the INTR input of
8086 will be recognized.
• DF- If set, string instruction automatically
decrements the address (string data transfers
proceed from high address to the low address.
POINTER AND INDEX REGISTERS
• There are two pointer and two index registers
in the EU of 8086.
• These registers are used to store the offset
addresses of memory locations relative to the
segment registers.
POINTER REGISTER
Two pointer registers are :
• Stack pointer – The value in the SP always
represents the offset of the next stack location
that can be accessed.
• Base pointer – It also represents an offset
relative to SS register but is employed in the
based addressing mode of 8086.
INDEX REGISTER
Two index registers are:
• Source index (SI)- It is used to store an offset
address for source operand.
• Destination index (DI)- It is used for storage of
an offset address for the destination operand.

8086 Microprocessor: Ram Murat Singh

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8086 Microprocessor: Ram Murat Singh

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8086 MICROPROCESSOR

RAM MURAT SINGH

8086 Microprocessor is divided into two

• The segment registers contain 16-bit segment base addresses related to

Segment address- 1005H

• There are eight 8-bit general purpose registers

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