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Cisc & Risc: Mr. Sunanda Das

CISC and RISC are two types of instruction set architectures (ISAs). CISC uses fewer instructions that perform multiple operations over multiple clock cycles, making it easier to compile programs. RISC uses more basic instructions that are independently executed to complete tasks over multiple clock cycles. A key difference is that CISC instructions are more complex and take varying times to execute, while RISC instructions are simpler and uniformly take one clock cycle. Examples show multiplying two numbers requires one instruction in CISC but four simpler instructions in RISC.

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100% found this document useful (1 vote)
47 views19 pages

Cisc & Risc: Mr. Sunanda Das

CISC and RISC are two types of instruction set architectures (ISAs). CISC uses fewer instructions that perform multiple operations over multiple clock cycles, making it easier to compile programs. RISC uses more basic instructions that are independently executed to complete tasks over multiple clock cycles. A key difference is that CISC instructions are more complex and take varying times to execute, while RISC instructions are simpler and uniformly take one clock cycle. Examples show multiplying two numbers requires one instruction in CISC but four simpler instructions in RISC.

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CISC & RISC

Mr. Sunanda Das


ISA (Instruction Set Architecture)
• Instruction set architecture(ISA) is the set of processor design techniques used to implement the
instruction work flow on hardware.

• In more practical words, ISA tells you that how your processor going to process your program
instructions.

• An instruction set architecture (ISA) is an abstract model of a computer.

• An ISA permits multiple implementations that may vary in performance, physical size, and monetary
cost (among other things); because the ISA serves as the interface between software and hardware.
• The Instruction Set Architecture (ISA) defines the way in which a
microprocessor is programmed at the machine level.

•  Different architectures have their own sets of instructions, syntax,


data types, and addressing modes that are of interest to the
programmer at the machine level.
ISA Level
CISC vs RISC

• There is no single way to classify ISAs, but one of the more traditional ways is by
the complexity of the instruction set. 

1. CISC (Complex Instruction Set Computer)


2. RISC (Reduced Instruction Set Computer)
CISC vs RISC

• CISC tends to use fewer lines of assembly code, each performing multiple steps in
multiple clock cycles, making it easier to compile higher-level languages.

• In contrast, RISC uses more basic instructions that are executed independently to


complete a task.
• The RISC approach uses more lines of code.
• The individual low-level instructions inherent in RISC are also more conducive to
pipelining.
RISC Architecture
• This is small or reduced set of instructions.
• Every instruction is expected to attain very small jobs

• In this machine, the instruction sets are modest and simple,


which help in comprising more complex commands.

• Each instruction is about the similar length; these are


wound together to get compound tasks done in a single
operation.

• Most commands are completed in one machine cycle. 


 Features of RISC
• The features of RISC include the following

• The demand of decoding is less


• Few data types in hardware
• General purpose register Identical
• Uniform instruction set
• Simple addressing modes
Microcode
• A set of elementary instructions in a complex instruction set computer
(CISC)

• The microcode resides in a separate high-speed memory.

• It functions as a translation layer between the machine instructions and the


circuit level of the computer.

•  Microcode enables the computer designer to create machine instructions


without having to design electronic circuits.
Microinstruction
• A single instruction in microcode. 

• it is the most elementary instruction in the computer, such as moving


the contents of a register to the arithmetic logic unit (ALU). 

•  It takes several microinstructions to carry out one complex machine


instruction (CISC).
CISC Architecture
• It has a huge number of compound
instructions, which takes a long time to
perform.

• A single set of instruction is processed in


several steps.

• Maximum instructions are finished in two to


ten machine cycles
Features of CISC
• CISC chips have complex instructions.
• CISC consists of less number of registers and more number of
addressing modes
• Complex addressing modes.
• CISC processor takes varying cycle time for execution of instructions –
multi-clock cycles.
• Because of the complex instruction set of the CISC, the pipelining
technique is very difficult.
Examples
• Let we take an example of multiplying two numbers
• A = A * B;
The CISC Approach :
• The primary goal of CISC architecture is to complete a task in as few
lines of assembly as possible.
• This is achieved by building processor hardware that is capable of
understanding & executing a series of operations, this is where our
CISC architecture introduced .
                     
•  For this particular task, a CISC processor would come prepared with a
specific instruction (we’ll call it “MULT”). When executed, this
instruction
• Loads the two values into separate registers
• Multiplies the operands in the execution unit
• And finally third, stores the product in the appropriate register.

• Thus, the entire task of multiplying two numbers can be completed


with one instruction:
                                          MULT A,B          
The RISC Approach :
• RISC processors only use simple instructions that can be executed
within one clock cycle. Thus, the “MULT” command described above
could be divided into three separate commands:

• “LOAD” which moves data from the memory bank to a register


• “PROD” which finds the product of two operands located within the registers
• “STORE” which moves data from a register to the memory banks.
•  In order to perform the exact series of steps described in the CISC
approach, a programmer would need to code four lines of assembly:

                                        LOAD R1, A          <<<======this is assembly statement


                                        LOAD R2,B          <<<======this is assembly statement
                                        PROD A, B           <<<======this is assembly statement
                                        STORE R3, A       <<<======this is assembly statement
ComparisonBetween
Comparison BetweenRISC
RISC&&CISC
CISC
References

• https://en.wikipedia.org/wiki/Instruction_set_architecture
• https://www.edgefxkits.com/blog/what-is-risc-and-cisc-architecture/
• http://www.firmcodes.com/difference-risc-sics-architecture/
• https://www.elprocus.com/difference-between-risc-and-cisc-architect
ure/
• https://www.elprocus.com/what-is-risc-and-cisc-architecture-and-the
ir-workings/

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