BCSE205L- Computer Architecture and

Organization
 Module:1 Introduction To Computer Architecture and Organization
Overview of Organization and Architecture–Functional components of a
computer:Registers and register files - Interconnection of components -
Overview of IAS computer function - Organization of the von Neumann
machine - Harvard architecture -Overview of Organization and Architecture
CISC & RISC Architectures.
 Overview of Organization and Architecture

 The architecture of a computer system can be considered as a catalogue

of tools or attributes that are visible to the user such as instruction sets,
number of bits used for data, addressing techniques, etc.
 Organization of a computer system defines the way system is structured
so that all those catalogued tools can be used. The significant
components of Computer organization are ALU, CPU, memory and
memory organization.
 Computer Architecture VS Computer Organization
Computer Architecture Computer Organization
Computer Architecture is concerned with the way hardware
Computer Organization is concerned with the structure and
components are connected together to form a computer
behaviour of a computer system as seen by the user.
system.

It acts as the interface between hardware and software. It deals with the components of a connection in a system.

Computer Architecture helps us to understand the Computer Organization tells us how exactly all the units in
functionalities of a system. the system are arranged and interconnected.

A programmer can view architecture in terms of Whereas Organization expresses the realization of
instructions, addressing modes and registers. architecture.

While designing a computer system architecture is

An organization is done on the basis of architecture.
considered first.

Computer Architecture deals with high-level design issues. Computer Organization deals with low-level design issues.

Architecture involves Logic (Instruction sets, Addressing Organization involves Physical Components (Circuit
modes, Data types, Cache optimization) design, Adders, Signals, Peripherals)
 Evolution of Computing Devices
ENIAC (Electronic Numerical Integrator and Computer) was the first computing
system designed in the early 1940s. It consisted of 18,000 buzzing electronic switches
called vacuum tubes, 42 panels each 9'x 2'x1'. It was organized in U-Shaped around the
perimeter of a room with forced air cooling.
•Atanasoff-Berry Computer (ABC) design was known as the first digital electronic
computer (though not programmable). It was designed and built by John Vincent
Atanasoff and his assistant, Clifford E. Berry in 1937.
•In 1941, Z3 was invented by German inventor Konrad Zuse. It was the first working
programmable, fully automatic computing machine.
•Transistors were invented in 1947 at Bell Laboratories which were a fraction the size
of the vacuum tubes and consumed less power, but still, the complex circuits were not
•In 1983, Lisa was launched as the first personal computer with a graphical user
interface (GUI) that was sold commercially; it ran on the Motorola 68000, dual floppy
disk drives, a 5 MB hard drive and had 1MB of RAM.
•In 1968, Robert Noyce co-founded Intel Electronics company which is still the
global market leader in IC manufacturing, research, and development.
•In 1990, Apple released the Macintosh Portable; it was heavy weighing 7.3 kg (16 lb)
and extremely expensive. It was not met with great success and was discontinued only
two years later.
•In 1990, Intel introduced the Touchstone Delta supercomputer, which had 512
microprocessors. This technological advancement was very significant as it was used
as a model for some of the fastest multi-processors systems in the world.
 Functional Components of a
Computer
 A computer is a combination of hardware and software resources that
integrate and provide various functionalities to the user.
 Hardware consists of the physical components of a computer, such as the
processor, memory devices, monitor, keyboard, etc.
 Software is the set of programs or instructions required by the hardware
resources to function properly.
 There are a few basic components that aids the working-cycle of a computer
i.e. the Input- Process- Output Cycle and these are called as the functional
components of a computer
•Input Unit :The input unit consists of input devices that are attached to the computer.
These devices take input and convert it into binary language that the computer
understands. Some of the common input devices are keyboard, mouse, joystick,
scanner etc.
•Central Processing Unit (CPU) : The CPU
is called the brain of the computer because it
is the control center of the computer. The data
is fetched from memory or input device.
Thereafter CPU executes or performs the
required computation and then either stores
the output or displays on the output device.
The CPU has three main components which
are responsible for different functions –
Arithmetic Logic Unit (ALU), Control Unit (CU)
and Memory registers
•Arithmetic and Logic Unit (ALU) : The ALU performs both mathematical calculations
and takes logical decisions. Arithmetic calculations include addition, subtraction,
multiplication and division. Logical decisions involve comparison of two data items to
see which one is larger or smaller or equal.

•Control Unit : The Control unit coordinates and controls the data flow in and out of
CPU and also controls all the operations of ALU, memory registers and also
input/output units. It is also responsible for carrying out all the instructions stored in the
program. It decodes the fetched instruction, interprets it and sends control signals to
input/output devices until the required operation is done properly by ALU and memory.
•Memory : Memory attached to the CPU is used for storage of data and instructions
and is called internal memory The internal memory is divided into many storage
locations, each of which can store data or instructions. Each memory location is of the
same size and has an address. With the help of the address, the computer can read
any memory location easily without having to search the entire memory. when a
program is executed, it’s data is copied to the internal memory and is stored in the
memory till the end of the execution. The internal memory is also called the Primary
memory or Main memory. This memory is also called as RAM, i.e. Random Access
Memory. The time of access of data is independent of its location in memory, therefore
this memory is also called Random Access memory (RAM).
•Output Unit : The output unit consists of output devices that are attached with the
computer. It converts the binary data coming from CPU to human understandable
form. The common output devices are monitor, printer, plotter etc.
 Information in a computer -- Instructions
• Instructions specify commands to:
• Transfer information within a computer (e.g., from memory to ALU)
• Transfer of information between the computer and I/O devices (e.g., from
keyboard to computer or computer to printer)
• Perform arithmetic and logic operations (e.g., Add two numbers, Perform
a logical AND).
• A sequence of instructions to perform a task is called a program, which is
stored in the memory.
• Processor fetches instructions that make up a program from the memory
and performs the operations stated in those instructions. 15
 Information in a computer -- Data

• Data are the “operands” upon which instructions operate.

• Data could be:

• Numbers,
• Encoded characters.

• Data, in a broad sense means any digital information.

• Computers use data that is encoded as a string of binary digits called bits.
 Connection between the Functional Units
• For a computer to achieve its operation, the functional units need to communicate
with each other.
• In order to communicate, they need to be connected.

Input Output Memory Processor

Bus

• A group of parallel wires may connect functional units that is called a bus
• Each wire in a bus can transfer one bit of information.
• The number of parallel wires in a bus is equal to the word length of a computer

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 Drawbacks of the Single Bus Structure
• The devices connected to a bus vary widely in their speed of operation
• Some devices are relatively slow, such as printer and keyboard
• Some devices are considerably fast, such as optical disks
• Memory and processor units operate are the fastest parts of a computer

• Efficient transfer mechanism thus is needed to cope with this problem

• A common approach is to include buffer registers with the devices to hold the
information during transfers
• An another approach is to use two-bus structure and an additional transfer mechan
• A high-performance bus, a low-performance, and a bridge for transferring the data
between the two buses - ARMA Bus belongs to this structure.
 REGISTER AND REGISTER FILES
Registers are a fundamental component of digital computer systems. They are
small, fast, and highly efficient memory storage units that temporarily store data
and instructions during the execution of programs.
Registers are used to perform a variety of tasks, including:
 Holding data temporarily for processing by the CPU
 Holding addresses of memory locations for data retrieval
 Holding intermediate results of arithmetic and logic operations
 Holding control information, such as status flags and interrupt flags
 Providing input/output interface with peripherals
Registers are classified based on their functions and size. Some common
types of registers include:
 Program Counter (PC): A special-purpose register that contains the
address of the next
instruction to be executed.
 Instruction Register (IR): A register that holds the current instruction
being executed.
 General-Purpose Registers (GPRs): Registers that are used to store
data temporarily during the execution of a program.
 Special-Purpose Registers (SPRs): Registers that are used for specific
functions, such as status flags and interrupt flags.
Connection between the processor and the memory
 Instruction register (IR)

 Program counter (PC)

 Memory address register (MAR)

 Memory data register (MDR)

General-purpose registers (R0 – Rn-1) are used to store temporary

data during any ongoing operation. Its content can be accessed by
assembly programming.
 In addition to ALU and CU circuitry, the processor has special-purpose and
general-purpose registers
 Instruction register (IR) - Holds the instruction that is currently being executed.
 Program counter (PC) – Holds the memory address of the next instruction to be
fetched and executed. During the execution of an instruction, the content of the
PC is updated to the address of the next instruction to be executed.
To facilitate the communication with memory and processor
 Memory address register (MAR) – Holds the address of the location to be
accessed.
 Memory data register (MDR) – Contains the data to be written into or read
out of the addressed location
Steps to Fetch Instruction from memory
1. Program - stored in memory through input unit
2. PC is set to point to the first instruction (holds the address of the first instruction)
3. The contents of PC are transferred to MAR and Read control signal is sent to the memory
4. The instruction in the corresponding address (MAR) is fetched from memory and loaded into
MDR.
5. The contents of MDR are transferred to IR
6. Instruction - ready for execution
Steps to Fetch Data
• If operand is in memory, the corresponding address should be sent to MAR – initiating Read Cycle.
• Data fetched from memory and stored in MDR , then to ALU
• Perform operation in ALU
• Store the result back in the memory
• To general-purpose register
• To memory (address to MAR, result to MDR – Write in memory in specified location)
 Registers
• To speed up the processor operations, the processor includes some internal
memory storage locations called registers..
• Memory hierarchy

• Registers

• Cache memory

• Main memory

• Secondary memory

• At a higher level of hierarchy, memory is faster and more expensive.

• Registers are top level of the hierarchy.

• Two roles

User visible registers - referenced by machine

instruction

Control and Status registers - employed to control

the operation.

• User Visible Registers

General Purpose

Data

Address

Condition Codes
 User Visible - Registers
General purpose registers:

• Register can contain the operand for any Opcode

• Opcode is a part of the instruction that tells the processor what should be done

• Operand is a part of the instruction that contains the data to be acted on, or the
memory location of the data in a register.

Restricted Registered

• Used for specific operations like floating point and stack operations (dedicated
registers)
Data registers

Used only to hold data and cannot be employed in the calculation of an operand

address.

Accumulator (AC)

The accumulator is a register that acts as a temporary storage location that holds

intermediate value in arithmetic and logic operation results.

• Address registers - devoted for a particular addressing mode.

Segment registers hold the address of the base of the segment

Index registers used for indexed addressing and may be auto-indexed

(increment).
Flag registers

This is the status register that contains the current state of the processor.

Reflects the result of arithmetic operation.

Condition Code Register(Flag)

CCR contains five flag bits, they are set by the ALU to hold information about the
result of an arithmetic or logical operation instruction that has just been executed
Condition Code Register(Flag)

• Flags in CCR

• Carry C : Set to 1 if an add operation produces a carry or a subtract operation

produces a borrow otherwise cleared to 0
• Overflow V: Useful only during operations on signed integers.

• Zero Z: Set to 1 if the result is 0, otherwise cleared to 0.

• Negate N: Meaningful only in signed number operations. Set to 1 if a negative

result is produced.
• Extend X: Functions as a carry for multiple precision arithmetic operations.
 Control Status Registers:
• Not visible to the user, visible in a control or operating system mode
(supervisory mode).
Program counter holds the address of the instruction that should be executed
next.
Instruction register holds the actual instruction to be executed

Memory Address Register ( connects to address bus)

Memory Buffer Register ( connects to data bus, feeds other registers.)

Example of Register Organizations
 Register Files (RF):
Set of general purpose registers.

It functions as small RAM and is implemented using fast RAM technology.

RF needs several access ports for simultaneously reading from or writing to
several different registers.

Hence RF is realized as multiport RAM.

A standard RAM (SRAM) has just one access port with an associated address
bus and data bus.

SRAMs will usually read and write through the same ports.
 Register
Files with three access ports symbol
A Register File with three access ports – logic
diagram

Data in C
Ex: R3 ← R1 + R2
16
Read Address A = 01
Write 11 2 4-way 16-bit
Read Address B = 10
address C S demultiplexer Write Address C = 11
16 16 16 16

16-bit register R3 16-bit register R2 16-bit register R1 16-bit register R0

0101
16 16
●
16 ●
● 16
●

2 4-way 16-bit 4-way 16-bit 2

S S
01
Read
multiplexer multiplexer
Read
address A 16 16 address B
Data out A
Data out B
A Register File with three access ports – logic
diagram
1011
Data in C
Ex: R3 ← R1 + R2
16
Read Address A = 01
2 4-way 16-bit
Read Address B = 10
Write
address C
11 S demultiplexer Write Address C = 11
16 16 16 16

16-bit register R3 16-bit register R2 16-bit register R1 16-bit register R0

0110 0101
16 16
●
16 ●
● 16
●

2 4-way 16-bit 4-way 16-bit 2

S S
01 multiplexer multiplexer 10
Read Read
address A 16 16 address B
Data out A
Data out B
 Interconnection of Components - Bus
Structures
 All five functional units must be connected
in some way to form an operational
system.
 There are many ways to connect different
parts inside a computer together.

• Bus

• A group of lines that serves as a connecting

path for several devices.

• Group of conducting lines that carries data,

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address and control signals.
 The simplest way to interconnect
functional units is to use single bus.

 It can support only one transfer at a time.

 Only two units can actively use the bus at

any given time.

 Advantages: Simple, low cost, flexibility

for attaching peripheral devices.

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 Multiple Bus structure achieve more concurrency in operations by allowing two or
more transfers to be carried out at the same time.
 It provides better performance at an increased cost and complexity.

40
 Speed Issues

 Different devices have different transfer/operate speed.

 If the speed of bus is bounded by the slowest device connected to it, the
efficiency will be very low.

 How to solve this?

 A common approach – Use buffer registers.

 Buffer registers are used to prevent a high speed processor from
being locked to a slow I/O device during a sequence of data transfer.

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 IAS
The most famous first- generation computer, known as the IAS computer.

 A fundamental design approach first implemented in the IAS computer is known as

the stored- program concept.

This idea is usually attributed to the mathematician John von Neumann

In 1946, von Neumann and his colleagues began the design of a new stored-
program computer, referred to as the IAS computer, at the Princeton Institute for
Advanced Studies.

The IAS computer, although not completed until 1952, is the prototype of all
subsequent general- purpose computers
 Von Neumann architecture

The modern computers are based on a stored-program concept introduced by

John Von Neumann.

It is an architecture where the data and programs are subjected to shared
memory i.e., are stored in the same memory block.

The Von Neumann processor operates fetching and execution cycles in a

serial manner.
Like we have said that in this architecture, data and instructions both reside
in a single memory unit hence a single set of buses is used by the CPU
to access the memory.
• A computer architecture that uses a single memory unit within which both data and instructions get stored is known

as Von Neumann architecture.

• Along with this, there is a single bus for memory access, an arithmetic unit, and a program control unit.

• The memory of the IAS consists of 4,096 storage locations, called words, of 40 binary digits (bits) each.

• Both data and instructions are stored there. Numbers are represented in binary form, and each instruction is a

binary code.

• This instruction may be taken from the IBR, or it can be obtained from memory by loading a word into the MBR and

then to IBR. MBR - > IBR

• the opcode of the instruction is loaded into the IR and

• the address portion is loaded into the MAR.

• Each number is represented by a sign bit and a 39-bit value.

• A word may alternatively contain two 20-bit instructions

• each instruction consisting of an 8-bit operation code (opcode) specifying the

operation to be performed and

• a 12-bit address
• The IAS computer had a total of 21 instructions,

• These can be grouped as follows:

• Data transfer: Move data between memory and ALU registers or between two ALU registers.

• Unconditional branch: Normally, the control unit executes instructions in sequence from memory. This

sequence can be changed by a branch instruction, which facilitates repetitive operations

• Conditional branch: The branch can be made dependent on a condition, thus allowing decision

points.

• Arithmetic: Operations performed by the ALU.

• Address modify: Permits addresses to be computed in the ALU and then inserted into instructions

stored in memory. This allows a program considerable addressing flexibility

 Basic operational concepts

• In most of Modern computers the instructions can be realized as follows Ex.

C=a+b;
– Load LOCA, R1

– Load LOCB, R2

– Add R1, R2, R3

• Execution procedure

– First instruction transfers the contents of memory location LOC into processor
register R1 and R2
– Then instruction adds the content of R1 and R2 and places the sum into R3
 Flow Of Operations For The Expression (A*B)+C.
Step-by-Step Execution
Step 4: Load C into Register R3
Step 1: Load A into Register R1
•Instruction: LOAD R3, MEM[C]
•Instruction: LOAD R1, MEM[A]
1.The address of C is placed in MAR.
1.The address of A is placed in the Memory Address Register
2.The data at MEM[C] is fetched into MBR.
(MAR).
3.The value in MBR is transferred to Register R3.
2.The data at MEM[A] is fetched into the Memory Buffer
Step 5: Add C to the Product (A * B)
Register (MBR).
•Instruction: ADD R1, R3
3.The value in MBR is transferred to Register R1.
1.The ALU performs addition: R1 = R1 + R3.
Step 2: Load B into Register R2
2.The result of (A * B) + C is stored in R1.
•Instruction: LOAD R2, MEM[B]
Step 6: Store the Result Back to Memory
1.The address of B is placed in MAR.
•Instruction: STORE MEM[RESULT], R1
2.The data at MEM[B] is fetched into MBR.
1.The value in R1 (the result of (A * B) + C) is placed in
3.The value in MBR is transferred to Register R2.
MBR.
Step 3: Multiply R1 and R2 (A * B)
2.The address of RESULT is placed in MAR.
•Instruction: MUL R1, R2
3.The data in MBR is stored in MEM[RESULT].
1.The ALU performs multiplication: R1 = R1 * R2.
2.The result of A * B is stored in R1.
Flow of Instructions
Here’s a summary of the sequence of instructions executed:
Step Instruction Description

1 LOAD R1, MEM[A] Load A into Register R1

2 LOAD R2, MEM[B] Load B into Register R2

Multiply R1 and R2 → Store result

3 MUL R1, R2
in R1

4 LOAD R3, MEM[C] Load C into Register R3

Add R1 (A * B) and R3 (C) → Store

5 ADD R1, R3
in R1

6 STORE MEM[RESULT], R1 Store the result back to memory

 Von Neumann bottleneck

 Whatever we do to enhance performance, we cannot get away from the fact that instructions

can only be done one at a time and can only be carried out sequentially.

 Both of these factors hold back the competence of the CPU. This is commonly referred to as

the ‘Von Neumann bottleneck’.

 We can provide a Von Neumann processor with more cache, more RAM, or faster components

but if original gains are to be made in CPU performance then an influential inspection needs to

take place of CPU configuration.

 This architecture is very important and is used in our PCs and even in Super Computers.
 Harvard architecture
• In von Neumann architecture, instructions, and data both are stored in the same
memory. So same buses are used to fetch instructions and data. This means the
CPU cannot do both things together (read the instruction and read/write data).
So, to overcome this problem, Harvard architecture was introduced.

• The Harvard architecture has two separate memory spaces dedicated to program
code and to data, respectively, two corresponding address buses, and two data
buses for accessing two memory spaces.

• The Harvard processor offers fetching and executions in parallel.

 Features of Harvard Architecture

• Separate data path and instruction path is available.

• Fetching of data and instructions can be done simultaneously

• Both memories can use different cell sizes making effective use of resources.

• Greater memory bandwidth that is more predictable (separate memory for

instructions and data)

• There is less chance of corruption since data and instructions are transferred via
different buses
Comparison of von Neumann and Harvard Architecture
 RISC Architecture
 RISC stands for Reduced Instruction Set Computer Processor.
 It is built to minimize the instruction execution time by optimizing and limiting
the number of instructions.
 It means each instruction cycle requires only one clock cycle, and each cycle
contains three parameters: fetch, decode and execute.
 The RISC processor is also used to perform various complex instructions by
combining them into simpler ones.
 RISC chips require several transistors, making it cheaper to design and reduce
the execution time for instruction.
Features of RISC Processor
Some important features of RISC processors are
1.One cycle execution time: For executing each instruction in a computer, the RISC
processors require one CPI (Clock per cycle). And each CPI includes the fetch, decode
and execute method applied in computer instruction.
2.Pipelining technique: The pipelining technique is used in the RISC processors to
execute multiple parts or stages of instructions to perform more efficiently.
3.A large number of registers: RISC processors are optimized with multiple registers
that can be used to store instruction and quickly respond to the computer and minimize
interaction with computer memory.
4.It supports a simple addressing mode and
fixed length of instruction for executing the
pipeline.
5.It uses LOAD and STORE instruction to
access the memory location.
6.Simple and limited instruction reduces the
execution time of a process in a RISC.
Advantages of RISC Processor
 The RISC processor's performance is better due to the simple and limited
number of the instruction set.
 It requires several transistors that make it cheaper to design.
 RISC allows the instruction to use free space on a microprocessor because of
its simplicity.
 RISC processor is simpler than a CISC processor because of its simple and
quick design, and it can complete its work in one clock cycle.
Disadvantages of RISC Processor
 The RISC processor's performance may vary according to the code executed
because subsequent instructions may depend on the previous instruction for
their execution in a cycle.
 Programmers and compilers often use complex instructions.
 RISC processors require very fast memory to save various instructions that
require a large collection of cache memory to respond to the instruction in a
short time.
 CISC ARCHITECTURE
 The CISC Stands for Complex Instruction Set Computer
 It has a large collection of complex instructions that range from simple to very
complex and specialized in the assembly language level, which takes a long
time to execute the instructions.
 CISC approaches reducing the number of instruction on each program and
ignoring the number of cycles per instruction.
 It emphasizes to build complex instructions directly in the hardware because
the hardware is always faster than software.
Characteristics of CISC Processor
Following are the main characteristics of the RISC processor:
1.The length of the code is shorts, so it requires very little RAM.
2.CISC or complex instructions may take longer than a single clock cycle
to execute the code.
3.Less instruction is needed to write an application.
4.It provides easier programming in assembly language.
5.Support for complex data structure and easy compilation of high-level
languages.
6.It is composed of fewer registers and more addressing nodes, typically
5 to 20.
7.Instructions can be larger than a single word.
CISC Processors Architecture
The CISC architecture helps reduce program
code by embedding multiple operations on
each program instruction, which makes the
CISC processor more complex. The CISC
architecture-based computer is designed to
decrease memory costs because large
programs or instruction required large
memory space to store the data, thus
increasing the memory requirement, and a
large collection of memory increases the
memory cost, which makes them more
Advantages of CISC Processors
 The compiler requires little effort to translate high-level programs or statement
languages into assembly or machine language in CISC processors.
 The code length is quite short, which minimizes the memory requirement.
 To store the instruction on each CISC, it requires very less RAM.
 Execution of a single instruction requires several low-level tasks.
 CISC creates a process to manage power usage that adjusts clock speed and
voltage.
 It uses fewer instructions set to perform the same instruction as the RISC.
Disadvantages of CISC Processors
 CISC chips are slower than RSIC chips to execute per instruction cycle on
each program.
 The performance of the machine decreases due to the slowness of the clock
speed.
 Executing the pipeline in the CISC processor makes it complicated to use.
 The CISC chips require more transistors as compared to RISC design.
 In CISC it uses only 20% of existing instructions in a programming event.
 Difference between the RISC and CISC Processors

RISC CISC

It is a Reduced Instruction Set Computer. It is a Complex Instruction Set Computer.

It emphasizes on software to optimize the It emphasizes on hardware to optimize the

instruction set. instruction set.

It is a hard wired unit of programming in the

Microprogramming unit in CISC Processor.
RISC Processor.

It requires multiple register sets to store the It requires a single register set to store the
instruction. instruction.

RISC has simple decoding of instruction. CISC has complex decoding of instruction.

Uses of the pipeline are simple in RISC. Uses of the pipeline are difficult in CISC.

It uses a limited number of instruction that It uses a large number of instruction that
requires less time to execute the instructions. requires more time to execute the instructions.
It uses LOAD and STORE that are independent
It uses LOAD and STORE instruction in the
instructions in the register-to-register a program's
memory-to-memory interaction of a program.
interaction.

CISC has transistors to store complex

RISC has more transistors on memory registers.
instructions.
The execution time of RISC is very short. The execution time of CISC is longer.

RISC architecture can be used with high-end CISC architecture can be used with low-end
applications like telecommunication, image applications like home automation, security
processing, video processing, etc. system, etc.

It has fixed format instruction. It has variable format instruction.

The program written for RISC architecture needs Program written for CISC architecture tends to
to take more space in memory. take less space in memory.

Example of RISC: ARM, PA-RISC, Power Examples of CISC: VAX, Motorola 68000 family,
Architecture, Alpha, AVR, ARC and the SPARC. System/360, AMD and the Intel x86 CPUs.