Lecture 1.1.3 (System Bus Structure-data, Address and Control Bus)
Lecture 1.1.3 (System Bus Structure-data, Address and Control Bus)
ASSISTANT PROFESSOR
BE-CSE
SYSTEM BUS
The basic computer has eight registers, a memory unit, and a control unit.
Paths must be provided to transfer information from one register to another and
between memory and registers.
The number of wires will be excessive if connections are made between the
outputs of each register and the inputs of the other registers.
A more efficient scheme for transferring information in a system with many
registers is to use a common bus.
A bus is a set of wires. To send information from one component to other, the
source component outputs data onto the bus and the destination component
receives that data. As the complexity increases, it becomes more efficient to use
buses rather than direct connection between pair of devices.
Bus uses space and power. They also require less pins on the chip.
System Bus organization
Address Bus
When CPU reads data/instruction from or writes data to memory, it must specify the
address of the new location it wishes to access.
●CPU puts this address on the bus, memory takes the location as input and uses it
to access that location.
●All the components like keyboard, monitor or disk drive have a unique address as
well. While accessing address of such devices, CPU places address of that
particular device on the address bus. Each device reads the address placed on the
address bus and the designated device comes to know that it is being accessed.
● Address bus is unidirectional because of data flow in one direction, from the
processor to memory or from the processor to input/out devices.
Used by CPU for communicating with other devices within the computer.
●Control bus carries the commands from the CPU and returns status signals from
the devices.
●Lines:
oRead (R’) – single line that when active (at 0) indicates that device is being
read by the CPU.
oWrite (W’) - single line that when active (at 0) indicates that device is being
written by the CPU.
oACK: It delivers information that data was acknowledged by the device.
oBus request: Indicates that the device is requesting to access the bus.
oReset: reset the system.
oClock Signals: The signals on this line are used to synchronize data between
the CPU and a device.
● Control Bus is bidirectional.
● The control bus carries the control signals to control all the associated
peripherals, the microprocessor uses control bus to process data, that is
what to do with selected memory location signals are memory card,
memory write, input/output write
Common Bus System
Connections:
The outputs of all the registers except the OUTR (output register) are
connected to the common bus. The output selected depends upon the binary
value of variables S2, S1 and S0. The lines from common bus are connected to
the inputs of the registers and memory. A register receives the information
from the bus when its LD (load) input is activated while in case of memory the
Write input must be enabled to receive the information. The contents of
memory are placed onto the bus when its Read input is activated.
Various Registers:
4 registers DR, AC, IR and TR have 16 bits and 2 registers AR and PC have 12
bits. The INPR and OUTR have 8 bits each. The INPR receives character from
input device and delivers it to the AC while the OUTR receives character from
AC and transfers it to the output device. 5 registers have 3 control inputs LD
(load), INR (increment) and CLR (clear). These types of registers are similar to
a binary counter.
Abbreviation Register name
OUTR Output register
TR Temporary register
IR Instruction register
INPR Input register
AC Accumulator
DR Data register
PC Program counter
AR Address register
Basic Computer Registers Connected to Common Bus
Adder and logic circuit:
The adder and logic circuit provide the 16 inputs of AC. This circuit has 3 sets of
inputs. One set comes from the outputs of AC which implements register micro-
operations. The other set comes from the DR (data register) which are used to
perform arithmetic and logic micro- operations. The result of these operations is
sent to AC while the end around carry is stored in E as shown in diagram above.
The third set of inputs is from INPR.
Note:
The content of any register can be placed on the common bus and an
operation can be performed in the adder and logic circuit during the same clock
cycle.
ADVANTAGES OF BUSES:
DISADVANTAGES OF BUSES:
Video References:
● https://www.youtube.com/watch?v=xBYhHC8_A6o
● https://www.youtube.com/watch?v=qX_rqLO-tkU