A test case for stress testing Tang Nano 4K and 9K and Primer 20K (Gowin FPGAs)

A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.

RISC-V implementation of RV32I for FPGA board Tang Nano 9K utilizing on-board burst PSRAM, flash and SD card

My custom fork of the Linux kernel

RISC-V 32-bit Linux From Scratch

RISC-V Formal Verification Framework

Learning how to use arithmetic coding to do compression of any file type

Bluetooth Low Energy (BLE) packet sniffer and transmitter for both standard and non standard (raw bit) based on Software Defined Radio (SDR).

Bluetooth PHY based on one-bit input and output

SERV - The SErial RISC-V CPU

PicoRV32 - A Size-Optimized RISC-V CPU

RV64GC Emulator: A RISC-V System Emulator that can boot Linux

Run 64-bit Linux on LiteX + RocketChip

Very small self-compiling cross compiler for a subset of C

Learning FPGA, yosys, nextpnr, and RISC-V

Tile primitives for speedy kernels

A HDL SDRAM controller designed for retro hardware and FPGAs

A version of PicoSoc that runs from BRAM, with extra peripherals

Opensource toolchain for BL602/BL604, BL702/BL704/BL706, BL616/BL618, BL808 and other series of RISC-V based chips from Bouffalo Lab

A next-generation cloud native kernel designed to unlock best-in-class performance, security primitives and efficiency savings.

Small cross-platform rendering library.

wgpu v0.20 + winit v0.30 "hello triangle" on the web and native

A minimal example of using Rust, wgpu, and egui without using eframe

StreamDiffusion: A Pipeline-Level Solution for Real-Time Interactive Generation

MLX: An array framework for Apple silicon

Fast GPT-2 inference written in Fortran

Simple and efficient pytorch-native transformer text generation in <1000 LOC of python.

Stable Diffusion with Core ML on Apple Silicon

GPU-targeted vendor-agnostic AI library for Windows, and Mistral model implementation.