🎯
Focusing
Pinned Loading
-
maccelarator
maccelarator PublicMotion Estimation Accelerator, written in SV - Synthesisable On FPGAs
SystemVerilog 7
-
small_soc
small_soc PublicThe SoC system has high efficiency 8-bit register cells and has custom RISC instruction set architecture. The main components of this designed architecture are CPU, memory system, timer units and I…
VHDL
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.

