chore: remove unused feature flags and fixed some clippy warnings by …

…rust 1.80 (lancedb#2641) Co-authored-by: Will Jones <[email protected]> Co-authored-by: Lance Release <[email protected]> Co-authored-by: rmeng <[email protected]>
westonpace · Jul 30, 2024 · c43424c · c43424c
1 parent 6ebeaa0
commit c43424c
Show file tree

Hide file tree

Showing 8 changed files with 109 additions and 125 deletions.
diff --git a/rust/lance-core/src/utils/mask.rs b/rust/lance-core/src/utils/mask.rs
@@ -478,6 +478,7 @@ impl RowIdTreeMap {
     ///
     /// The serialization format is:
     /// * u32: num_entries
+    ///
     /// for each entry:
     ///   * u32: fragment_id
     ///   * u32: bitmap size

diff --git a/rust/lance-index/src/lib.rs b/rust/lance-index/src/lib.rs
@@ -9,11 +9,6 @@
 //! API stability is not guaranteed.
 //! </section>
 
-#![cfg_attr(
-    all(feature = "nightly", target_arch = "x86_64"),
-    feature(stdarch_x86_avx512)
-)]
-
 use std::{any::Any, sync::Arc};
 
 use async_trait::async_trait;

diff --git a/rust/lance-index/src/vector/pq/distance.rs b/rust/lance-index/src/vector/pq/distance.rs
@@ -63,41 +63,13 @@ pub(super) fn compute_l2_distance<const C: usize, const V: usize>(
         for i in (0..num_sub_vectors).step_by(C) {
             for (vec_idx, sum) in sums.iter_mut().enumerate() {
                 let vec_start = vec_idx * num_sub_vectors;
-                #[cfg(all(feature = "nightly", target_feature = "avx512f"))]
-                {
-                    use std::arch::x86_64::*;
-                    if i + C <= num_sub_vectors {
-                        let mut offsets = [(i * num_centroids) as i32; C];
-                        for k in 0..C {
-                            offsets[k] += (k * num_centroids) as i32 + c[vec_start + k] as i32;
-                        }
-                        unsafe {
-                            let simd_offsets = _mm512_loadu_epi32(offsets.as_ptr());
-                            let v = _mm512_i32gather_ps(
-                                simd_offsets,
-                                distance_table.as_ptr() as *const u8,
-                                4,
-                            );
-                            *sum += _mm512_reduce_add_ps(v);
-                        }
-                    } else {
-                        let mut s = 0.0;
-                        for k in 0..num_sub_vectors - i {
-                            *sum +=
-                                distance_table[(i + k) * num_centroids + c[vec_start + k] as usize];
-                        }
-                    }
-                }
-                #[cfg(not(all(feature = "nightly", target_feature = "avx512f")))]
-                {
-                    let s = c[vec_start + i..]
-                        .iter()
-                        .take(min(C, num_sub_vectors - i))
-                        .enumerate()
-                        .map(|(k, c)| distance_table[(i + k) * num_centroids + *c as usize])
-                        .sum::<f32>();
-                    *sum += s;
-                }
+                let s = c[vec_start + i..]
+                    .iter()
+                    .take(min(C, num_sub_vectors - i))
+                    .enumerate()
+                    .map(|(k, c)| distance_table[(i + k) * num_centroids + *c as usize])
+                    .sum::<f32>();
+                *sum += s;
             }
         }
         sums.into_iter()

diff --git a/rust/lance-linalg/src/simd/f32.rs b/rust/lance-linalg/src/simd/f32.rs
@@ -280,16 +280,7 @@ impl SIMD<f32, 8> for f32x8 {
     }
 
     fn find(&self, val: f32) -> Option<i32> {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
-        unsafe {
-            // let tgt = _mm256_set1_ps(val);
-            // let mask = _mm256_cmpeq_ps_mask(self.0, tgt);
-            // if mask != 0 {
-            //     return Some(mask.trailing_zeros() as i32);
-            // }
-            todo!()
-        }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(target_arch = "x86_64")]
         unsafe {
             for i in 0..8 {
                 if self.as_array().get_unchecked(i) == &val {
@@ -450,11 +441,11 @@ impl Mul for f32x8 {
 
 /// 16 of 32-bit `f32` values. Use 512-bit SIMD if possible.
 #[allow(non_camel_case_types)]
-#[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+#[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
 #[derive(Clone, Copy)]
 pub struct f32x16(__m256, __m256);
 #[allow(non_camel_case_types)]
-#[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+#[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
 #[derive(Clone, Copy)]
 pub struct f32x16(__m512);
 
@@ -496,11 +487,11 @@ impl SIMD<f32, 16> for f32x16 {
     #[inline]
 
     fn splat(val: f32) -> Self {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_set1_ps(val))
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_set1_ps(val), _mm256_set1_ps(val))
         }
@@ -524,11 +515,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     fn zeros() -> Self {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_setzero_ps())
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_setzero_ps(), _mm256_setzero_ps())
         }
@@ -544,11 +535,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     unsafe fn load(ptr: *const f32) -> Self {
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_load_ps(ptr), _mm256_load_ps(ptr.add(8)))
         }
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_load_ps(ptr))
         }
@@ -567,11 +558,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     unsafe fn load_unaligned(ptr: *const f32) -> Self {
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_loadu_ps(ptr), _mm256_loadu_ps(ptr.add(8)))
         }
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_loadu_ps(ptr))
         }
@@ -590,11 +581,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     unsafe fn store(&self, ptr: *mut f32) {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             _mm512_store_ps(ptr, self.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             _mm256_store_ps(ptr, self.0);
             _mm256_store_ps(ptr.add(8), self.1);
@@ -613,11 +604,11 @@ impl SIMD<f32, 16> for f32x16 {
     #[inline]
 
     unsafe fn store_unaligned(&self, ptr: *mut f32) {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             _mm512_storeu_ps(ptr, self.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             _mm256_storeu_ps(ptr, self.0);
             _mm256_storeu_ps(ptr.add(8), self.1);
@@ -634,11 +625,11 @@ impl SIMD<f32, 16> for f32x16 {
     }
 
     fn reduce_sum(&self) -> f32 {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             _mm512_mask_reduce_add_ps(0xFFFF, self.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             let mut sum = _mm256_add_ps(self.0, self.1);
             // Shift and add vector, until only 1 value left.
@@ -668,11 +659,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     fn reduce_min(&self) -> f32 {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             _mm512_mask_reduce_min_ps(0xFFFF, self.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             let mut m1 = _mm256_min_ps(self.0, self.1);
             let mut m2 = _mm256_permute2f128_ps(m1, m1, 1);
@@ -706,11 +697,11 @@ impl SIMD<f32, 16> for f32x16 {
 
     #[inline]
     fn min(&self, rhs: &Self) -> Self {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_min_ps(self.0, rhs.0))
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_min_ps(self.0, rhs.0), _mm256_min_ps(self.1, rhs.1))
         }
@@ -730,7 +721,7 @@ impl SIMD<f32, 16> for f32x16 {
     }
 
     fn find(&self, val: f32) -> Option<i32> {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             // let tgt = _mm512_set1_ps(val);
             // let mask = _mm512_cmpeq_ps_mask(self.0, tgt);
@@ -739,7 +730,7 @@ impl SIMD<f32, 16> for f32x16 {
             // }
             todo!()
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             // _mm256_cmpeq_ps_mask requires "avx512l".
             for i in 0..16 {
@@ -785,11 +776,11 @@ impl SIMD<f32, 16> for f32x16 {
 impl FloatSimd<f32, 16> for f32x16 {
     #[inline]
     fn multiply_add(&mut self, a: Self, b: Self) {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             self.0 = _mm512_fmadd_ps(a.0, b.0, self.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             self.0 = _mm256_fmadd_ps(a.0, b.0, self.0);
             self.1 = _mm256_fmadd_ps(a.1, b.1, self.1);
@@ -814,11 +805,11 @@ impl Add for f32x16 {
 
     #[inline]
     fn add(self, rhs: Self) -> Self::Output {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_add_ps(self.0, rhs.0))
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_add_ps(self.0, rhs.0), _mm256_add_ps(self.1, rhs.1))
         }
@@ -841,11 +832,11 @@ impl Add for f32x16 {
 impl AddAssign for f32x16 {
     #[inline]
     fn add_assign(&mut self, rhs: Self) {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             self.0 = _mm512_add_ps(self.0, rhs.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             self.0 = _mm256_add_ps(self.0, rhs.0);
             self.1 = _mm256_add_ps(self.1, rhs.1);
@@ -870,11 +861,11 @@ impl Mul for f32x16 {
 
     #[inline]
     fn mul(self, rhs: Self) -> Self::Output {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_mul_ps(self.0, rhs.0))
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_mul_ps(self.0, rhs.0), _mm256_mul_ps(self.1, rhs.1))
         }
@@ -899,11 +890,11 @@ impl Sub for f32x16 {
 
     #[inline]
     fn sub(self, rhs: Self) -> Self::Output {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             Self(_mm512_sub_ps(self.0, rhs.0))
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             Self(_mm256_sub_ps(self.0, rhs.0), _mm256_sub_ps(self.1, rhs.1))
         }
@@ -926,11 +917,11 @@ impl Sub for f32x16 {
 impl SubAssign for f32x16 {
     #[inline]
     fn sub_assign(&mut self, rhs: Self) {
-        #[cfg(all(target_arch = "x86_64", feature = "avx512"))]
+        #[cfg(all(target_arch = "x86_64", target_feature = "avx512f"))]
         unsafe {
             self.0 = _mm512_sub_ps(self.0, rhs.0)
         }
-        #[cfg(all(target_arch = "x86_64", not(feature = "avx512")))]
+        #[cfg(all(target_arch = "x86_64", not(target_feature = "avx512f")))]
         unsafe {
             self.0 = _mm256_sub_ps(self.0, rhs.0);
             self.1 = _mm256_sub_ps(self.1, rhs.1);

diff --git a/rust/lance/Cargo.toml b/rust/lance/Cargo.toml
@@ -101,6 +101,7 @@ tracing-chrome = "0.7.1"
 rstest = "0.19.0"
 random_word = { version = "0.4.3", features = ["en"] }
 
+
 [features]
 fp16kernels = ["lance-linalg/fp16kernels"]
 # Prevent dynamic linking of lzma, which comes from datafusion

diff --git a/rust/lance/src/dataset/fragment.rs b/rust/lance/src/dataset/fragment.rs
@@ -693,7 +693,7 @@ impl FileFragment {
     /// * All field ids in the fragment are distinct
     /// * Within each data file, field ids are in increasing order
     /// * All fields in the schema have a corresponding field in one of the data
-    ///  files
+    ///   files
     /// * All data files exist and have the same length
     /// * Field ids are distinct between data files.
     /// * Deletion file exists and has rowids in the correct range

diff --git a/rust/lance/src/io/commit.rs b/rust/lance/src/io/commit.rs
@@ -45,7 +45,7 @@ use crate::dataset::{write_manifest_file, ManifestWriteConfig};
 use crate::index::DatasetIndexInternalExt;
 use crate::Dataset;
 
-#[cfg(all(target_feature = "dynamodb", test))]
+#[cfg(all(feature = "dynamodb", test))]
 mod dynamodb;
 #[cfg(test)]
 mod external_manifest;