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Digital System Design Exam 2020-21

This document contains a digital system design exam from 2020-21 with 7 sections and multiple choice and long answer questions. Section A has 10 short answer questions on topics like constructing a full adder, setup and hold time, differences between flip flops and latches, ripple carry and look ahead adders, number of flip flops needed for a 32 bit register, barrel shifters, and universal gates. Section B has 3 long answer questions involving conversions between number systems, k-map simplification, and proving Demorgan's theorem. Section C covers TTL NAND gate working and CMOS gates. Sections D-G each have 2 long answer questions involving topics such as FSMs, ADCs, sequential circuits,

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Pragya Agrawal
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232 views3 pages

Digital System Design Exam 2020-21

This document contains a digital system design exam from 2020-21 with 7 sections and multiple choice and long answer questions. Section A has 10 short answer questions on topics like constructing a full adder, setup and hold time, differences between flip flops and latches, ripple carry and look ahead adders, number of flip flops needed for a 32 bit register, barrel shifters, and universal gates. Section B has 3 long answer questions involving conversions between number systems, k-map simplification, and proving Demorgan's theorem. Section C covers TTL NAND gate working and CMOS gates. Sections D-G each have 2 long answer questions involving topics such as FSMs, ADCs, sequential circuits,

Uploaded by

Pragya Agrawal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

BTECH

(SEM III) THEORY EXAMINATION 2020-21


Time: 3 Hours DIGITAL SYSTEM DESIGN Total Marks: 100

Note: 1. Attempt all Sections. If require any missing data; then choose suitably.

SECTION A

1. Attempt all questions in brief.


Q no. Question Marks CO
a. Construct full adder using logic gates. 2
b. What is the concept of “setup” and “Hold” time? 2
c. What is difference between flip flop and latches? 2
d. What is difference between “Ripple Carry Adder” and Carry Look-ahead 2
Geneartor?
e. How many flip flops are needed to implement a 32 bit register? 2
f. What is barrel shifter? 2

i
g. Which gates are called universal gates and why?
ha 2
h. Differentiate between combinational logic circuit and sequential 2
circuits?
ad

i. Convert binary code(00011011) to gray code. 2


j. Implement a 4:1 multiplexer using 2:1 multiplexer. 2
iP

SECTION B
or

2. Attempt any three of the following:


Po

Q no. Question Marks CO


a. Convert the following 10
i. Hexadecimal equivalent of the decimal number 256
ii. Decimal equivalent of (123)9
iii. 378.9310 to octal
iv. Convert A3BH and 2F3H into binary.
b. Simplify using k-map to obtain a minimum POS expression: 10
(A’+B’+C+D)(A+B’+C+D)(A+B+C’+D”)(A’+B+C’+D’)(A+B+C’+D)
c. State and Prove Demorgan’s theorem. 10
d. For the clocked JK flip-flop write the state table, draw the state diagram 10
and the state equation.
e. Design a BCD adder using two 4 bit addresses. 10

SECTION C
3. Attempt any one part of the following:
Q no. Question Marks CO
a. With the help of a neat diagram, explain the working of a two-input TTL NAND 10
gate

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b. With the help of a neat diagram, explain the working of any two 10
I. a CMOS inverter, II. a two input CMOS NAND gate III. a two input
CMOS NOR gate

i
ha
ad
iP
or
Po

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4. Attempt any one part of the following:
Q no. Question Marks CO
a. Define the following terms 10
I. threshold voltage
II. II. propagation delay
III. III. power dissipation
IV. IV. fan-in
V. V. fan-out
b. Discuss Mealy and Moore FSM. What do you mean by excitation 10
table?

5. Attempt any one part of the following:


Q no. Question Marks CO
a. Explain the operation of FLASH ADC. 10

i
b. Explain the operation of successive approximation ADC. Discuss it 10
ha
merits and demerits.
ad

6. Attempt any one part of the following:


Q no. Question Marks CO
iP

a. Design a sequential circuit with two flip flops, A & B and one input x. 10
when x=0, the state of the circuit remains the same when x=1 the circuit
or

passes through the state transitions from 00 to 01 to 11 to 10 back to 00


& repeat.
Po

b. Explain 4bit Johnson counter with circuit diagram and waveforms. 10

7. Attempt any one part of the following:


Q no. Question Marks CO
a. Design and implement a synchronous 3-bit up/down counter using JK 10
flip-flops.
b. With a neat diagram explain the operation of R-2R DAC. 10

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