ADDRESSING MODES:

The various ways of accessing data (stored in register/ memory or be provided as an

immediate data) are called addressing modes.
There are several addressing modes available to the 8051 instruction set, as follows:

Immediate Addressing
Register Addressing
Direct Addressing
Indirect Addressing
Indexed Addressing

Immediate Addressing: Immediate addressing simply means that the operand (which
immediately follows the instruction opcode) is the data value to be used. For example the
instruction:

MOV A, #99d

Number 99d

Register Addressing: One of the eight general-registers, R0 to R7, can be specified as the
instruction operand. The assembly language documentation refers to a register generically
as Rn. Ex: ADD A, R5; Adds register R5 contents to A (accumulator)

Direct addressing: Means that the data value is obtained directly from the memory
location specified in the operand. For ex: MOV A, 47h. The instruction reads the data
from Internal RAM address 47h and stores this in the accumulator.
Direct addressing can be used to access Internal RAM , including the SFR registers.
Indirect Addressing: In this mode of addressing the instruction performs an operation on
the data whose address is contained in register R0 or R1. Instructions using indirect
addressing are single byte instructions. In 8051 assembly language the symbol @ before
R0 or R1 denotes indirect addressing.

An example instruction, which uses indirect addressing, is as follows:

MOV A, @R0

@ symbol indicates that it is indirect addressing mode. R0 contains a value, for example
54h, which is to be used as the address of the internal RAM location, which contains the
operand data. Indirect addressing refers to Internal RAM only and cannot be used to refer
to SFR registers.

Note: Only R0 or R1 can be used as register data pointers for indirect addressing when
using MOV instructions.
Indexed Addressing: With indexed addressing a separate register, either the program
counter, PC, or the data pointer DTPR, is used as a base address and the accumulator is
used as an offset
address. The effective address is formed by adding the value from the base address to the
value from the offset address. Indexed addressing in the 8051 is used with the JMP or
MOVC instructions. Look up tables are easy to implement with the help of index
addressing.

Consider the example instruction:

JMP @A+DPTR (PC) ¬ (A) +(DPTR)

MOVC A,@A+DPTR (A) ¬ ((A) + (DPTR))
MOVC A,@A+PC (PC) ¬ (PC) + 1
(A) ¬ ((A) + (PC))
 MOVC is a move instruction, which moves data from the external code memory space.
The address operand in this example is formed by adding the content of the DPTR
register to the accumulator value. Here the DPTR value is referred to as the base address
and the accumulator value us referred to as the index address.

2.1 Types of instructions

The 8051 instructions are divided among five functional groups:
i. Data transfer
ii. Arithmetic
iii. Logical
iv. Boolean
v. Program branching

The assembly level instructions include: data transfer instructions, arithmetic,

instructions, logical instructions, program control instructions, and some special
instructions such as the rotate instructions.

i. Data transfer

Many computer operations are concerned with moving data from one location to another.
The 8051 uses five different types of instruction to move data:
MOV MOVX MOVC PUSH and POP XCH

MOV
In the 8051 the MOV instruction is concerned with moving data internally, i.e. between
Internal RAM, SFR registers, general registers etc. MOVX and MOVC are used in
accessing external memory data. The MOV instruction has the following format:

MOV destination <- source

The instruction copies (copy is a more accurate word than move) data from a defined
source location to a destination location. Example MOV instructions are:

MOV R2, #80h ; Move immediate data value 80h to register R2

MOV R4, A ; Copy data from accumulator to register R4
MOV DPTR, #0F22Ch ; Move immediate value F22Ch to the DPTR register
MOV R2, 80h ; Copy data from 80h (Port 0 SFR) to R2
MOV 52h, #52h ; Copy immediate data value 52h to RAM location 52h
MOV 52h, 53h ; Copy data from RAM location 53h to RAM 52h
MOV A, @R0 ; Copy contents of location addressed in R0 to A
(Indirect addressing)
MOVX
The 8051 the external memory can be addressed using indirect addressing
only. The DPTR register is used to hold the address of the external data
(since DPTR is a 16-bit register it can address 64KByte locations: 216 =
64K). The 8 bit registers R0 or R1 can also be used for indirect addressing
of external memory but the address range is limited to the lower 256 bytes
of memory (28 = 256 bytes).

The MOVX instruction is used to access the external memory (X indicates

eXternal memory access). All external moves must work through the A
register (accumulator). Examples of MOVX instructions are:

MOVX @DPTR, A ; Copy data from A to the address

specified in DPTRMOVX A, @DPTR ; Copy data from
address specified in DPTR to A

MOVC
MOVX instructions operate on RAM, which is (normally) a volatile
memory. Program tables often need to be stored in ROM since ROM is
non-volatile memory. The MOVC instruction is used to read data from the
external code memory (ROM). Like the MOVX instruction the DPTR
register is used as the indirect address register. The indirect addressing is
enhanced to realize an indexed addressing mode where register A can be
used to provide an offset in the address specification. Like the MOVX
instruction all moves must be done through register A. The following
sequence of instructions provides an example:

MOV DPTR, # 2000h ; Copy the data value 2000h to the

DPTR registerMOV A, #80h ; Copy the data value 80h
to register A
MOVC A, @A+DPTR ; Copy the contents of the address 2080h (2000h + 80h) to register A

Note: for the MOVC the program counter can also be used to form the address.

XCH
The above move instructions copy data from a source location to a
destination location, leaving the source data unaffected. A special XCH
(eXCHange) instruction will actually swap the data between source
and destination, effectively changing the source data. Immediate
addressing may not be used with XCH. XCH instructions must use
register A. XCHD is a special case of the exchange instruction where just
the lower nibbles are exchanged. Examples using the XCH instruction are:

XCH A, R3 ; Exchange bytes between A and R3

XCH A, @R0 ; Exchange bytes between A and RAM location whose
address is in R0XCH A, A0h ; Exchange bytes between A and RAM
location A0h (SFR port 2)

PUSH & POP

 Module 2
Arithmetic instructions.

The 8051 can perform addition, subtraction. Multiplication and division operations on 8 bit numbers.

Addition
In this group, we have instructions to
i. Add the contents of A with immediate data with or without carry.
i. ADD A, #45H
ii. ADDC A, #OB4H
ii. Add the contents of A with register Rn with or without carry.
i. ADD A, R5
ii. ADDC A, R2
iii. Add the contents of A with contents of memory with or without carry using direct and indirect
addressing
i. ADD A, 51H
ii. ADDC A, 75H
iii. ADD A, @R1
iv. ADDC A, @R0

CY ,AC and OV flags will be affected by this operation.

Subtraction
In this group, we have instructions to
i. Subtract the contents of A with immediate data with or without carry.
i. SUBB A, #45H
ii. SUBB A, #OB4H
ii. Subtract the contents of A with register Rn with or without carry.
i. SUBB A, R5
ii. SUBB A, R2
iii. Subtract the contents of A with contents of memory with or without carry using direct and indirect
addressing
i. SUBB A, 51H
ii. SUBB A, 75H
iii. SUBB A, @R1
iv. SUBB A, @R0

CY AC and OV flags will be affected by this operation.

Multiplication

MUL AB. This instruction multiplies two 8 bit unsigned numbers which are stored in A and B register.
After multiplication the lower byte of the result will be stored in accumulator and higher byte of result
will be stored in B register.
Eg. MOV A,#45H ;[A]=45H
MOV B,#0F5H ;[B]=F5H
MUL AB ;[A] x [B] = 45 x F5 = 4209
;[A]=09H, [B]=42H

1
 Division
DIV AB. This instruction divides the 8 bit unsigned number which is stored in A by the 8 bit unsigned
number which is stored in B register. After division the result will be stored in accumulator and remainder
will be stored in B register.
Eg. MOV A,#45H ;[A]=0E8H
MOV B,#0F5H ;[B]=1BH
DIV AB ;[A] / [B] = E8 /1B = 08 H with remainder 10H
;[A] = 08H, [B]=10H

DA A (Decimal Adjust After Addition).

When two BCD numbers are added, the answer is a non-BCD number. To get the result in BCD, we use
DA A instruction after the addition. DA A works as follows.
 If lower nibble is greater than 9 or auxiliary carry is 1, 6 is added to lower nibble.
 If upper nibble is greater than 9 or carry is 1, 6 is added to upper nibble.

Eg 1: MOV A,#23H
MOV R1,#55H
ADD A,R1 // [A]=78
DA A // [A]=78 no changes in the accumulator after da a

Eg 2: MOV A,#53H
MOV R1,#58H
ADD A,R1 // [A]=ABh
DA A // [A]=11, C=1 . ANSWER IS 111. Accumulator data is changed after DA A

Increment: increments the operand by one.

INC A INC Rn INC DIRECT INC @RiINC DPTR

INC increments the value of source by 1. If the initial value of register is FFh, incrementing the value will
cause it to reset to 0. The Carry Flag is not set when the value "rolls over" from 255 to 0.

In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If the initial
value of DPTR is FFFFh, incrementing the value will cause it to reset to 0.

Decrement: decrements the operand by one.

DEC A DEC Rn DEC DIRECT DEC @Ri

DEC decrements the value of source by 1. If the initial value of is 0, decrementing the value will cause it
to reset to FFh. The Carry Flag is not set when the value "rolls over" from 0 to FFh.

Logical Instructions

Logical AND

ANL destination, source: ANL does a bitwise "AND" operation between source and destination,
leaving the resulting value in destination. The value in source is not affected. "AND" instruction logically
AND the bits of source and destination.
ANL A,#DATA ANL A, Rn
ANL A,DIRECT ANL
A,@Ri
ANL DIRECT,A ANL DIRECT, #DATA

2
Logical OR

ORL destination, source: ORL does a bitwise "OR" operation between source and destination,
leaving the resulting value in destination. The value in source is not affected. " OR " instruction
logically OR the bits of source and destination.
ORL A,#DATA ORL A, Rn
ORL A,DIRECT ORL
A,@Ri
ORL DIRECT,A ORL DIRECT, #DATA

Logical Ex-OR

XRL destination, source: XRL does a bitwise "EX-OR" operation between source and
destination, leaving the resulting value in destination. The value in source is not affected. " XRL "
instruction logically EX-OR the bits of source and destination.
XRL A,#DATA XRL A,Rn
XRL A,DIRECT XRL
A,@Ri
XRL DIRECT,A XRL DIRECT, #DATA

Logical NOT

CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the
bit will be reversed. If operand is the Accumulator then all the bits in the Accumulator will be reversed.

CPL A, CPL C, CPL bit address

SWAP A – Swap the upper nibble and lower nibble of A.

Rotate Instructions

RR A
This instruction is rotate right the accumulator. Its operation is illustrated below. Each bit is shifted one
location to the right, with bit 0 going to bit 7.

RL A
Rotate left the accumulator. Each bit is shifted one location to the left, with bit 7 going to bit 0

RRC A
Rotate right through the carry. Each bit is shifted one location to the right, with bit 0 going into the carry bit in the
PSW, while the carry was at goes into bit 7

RLC A
Rotate left through the carry. Each bit is shifted one location to the left, with bit 7 going into the carry bit in the
PSW, while the carry goes into bit 0.

3
Branch (JUMP) Instructions

Jump and Call Program Range

There are 3 types of jump instructions. They are:-
1. Relative Jump
2. Short Absolute Jump
3. Long Absolute Jump

Relative Jump
Jump that replaces the PC (program counter) content with a new address that is greater than (the address
following the jump instruction by 127 or less) or less than (the address following the jump by 128 or less)
is called a relative jump. Schematically, the relative jump can be shown as follows: -

The advantages of the relative jump are as follows:-

1. Only 1 byte of jump address needs to be specified in the 2's complement form, ie. For jumping
ahead, the range is 0 to 127 and for jumping back, the range is -1 to -128.
2. Specifying only one byte reduces the size of the instruction and speeds up program execution.
3. The program with relative jumps can be relocated without reassembling to generate absolute
jump addresses.

Disadvantages of the absolute jump: -

1. Short jump range (-128 to 127 from the instruction following the jump instruction)

Instructions that use Relative Jump

SJMP <relative address>; this is unconditional jump

The remaining relative jumps are conditional jumps

JC <relative address>
JNC <relative address>
JB bit, <relative address>
JNB bit, <relative address>
JBC bit, <relative address>
CJNE <destination byte>, <source byte>, <relative address>
DJNZ <byte>, <relative address>
JZ <relative address>
JNZ <relative address>

Short Absolute Jump

In this case only 11bits of the absolute jump address are needed. The absolute jump address is calculated
in the following manner.

4
In 8051, 64 kbyte of program memory space is divided into 32 pages of 2 kbyte each. The hexadecimal
addresses of the pages are given as follows:-

Page(Hex) Address (Hex)

00 0000 - 07FF
01 0800 - 0FFF
02 1000 - 17FF
03 1800 - 1FFF
.
.
1E F000 - F7FF
1F F800 - FFFF

It can be seen that the upper 5bits of the program counter (PC) hold the page number and the lower 11bits
of the PC hold the address within that page. Thus, an absolute address is formed by taking page numbers
of the instruction (from the program counter) following the jump and attaching the specified 11bits to it to
form the 16-bit address.

Advantage: The instruction length becomes 2 bytes.

Example of short absolute jump: -

ACALL <address 11>
AJMP <address 11>

Long Absolute Jump/Call

Applications that need to access the entire program memory from 0000H to FFFFH use long absolute
jump. Since the absolute address has to be specified in the op-code, the instruction length is 3 bytes
(except for JMP @ A+DPTR). This jump is not re-locatable.

Example: -

LCALL <address 16>

LJMP <address 16>
JMP @A+DPTR

Another classification of jump instructions is

1. Unconditional Jump
2. Conditional Jump

1. The unconditional jump is a jump in which control is transferred unconditionally to the target location.
a. LJMP (long jump). This is a 3-byte instruction. First byte is the op-code and second and third bytes
represent the 16-bit target address which is any memory location from 0000 to FFFFH
eg: LJMP 3000H
b. AJMP: this causes unconditional branch to the indicated address, by loading the 11 bit address to 0 -
10 bits of the program counter. The destination must be therefore within the same 2K blocks.
c. SJMP (short jump). This is a 2-byte instruction. First byte is the op-code and second byte is the
relative target address, 00 to FFH (forward +127 and backward -128 bytes from the current PC value).
To calculate the target address of a short jump, the second byte is added to the PC value which is
address of the instruction immediately below the jump.

5
2. Conditional Jump instructions.
JBC Jump if bit 1 and clear bit
＝

JNB Jump if bit 0 ＝

JB Jump if bit 1 ＝

JNC Jump if CY 0 ＝

JC Jump if CY 1 ＝

CJNE reg,#data Jump if byte ≠ #data

CJNE A,byte Jump if A ≠ byte
DJNZ Decrement and Jump if A ≠ 0
JNZ Jump if A ≠ 0
JZ Jump if A ＝ 0

All conditional jumps are short jumps.

Bit level jump instructions:

Bit level JUMP instructions will check the conditions of the bit and if condition is true, it jumps to the
address specified in the instruction. All the bit jumps are relative jumps.

JB bit, rel ; jump if the direct bit is set to the relative address specified. JNB
bit, rel ; jump if the direct bit is clear to the relative address specified.
JBC bit, rel ; jump if the direct bit is set to the relative address specified and then clear the bit.

Subroutine CALL And RETURN Instructions

Subroutines are handled by CALL and RET instructions There

are two types of CALL instructions

1. LCALL address(16 bit)

This is long call instruction which unconditionally calls the subroutine located at the indicated 16 bit
address. This is a 3 byte instruction. The LCALL instruction works as follows.
a. During execution of LCALL, [PC] = [PC]+3; (if address where LCALL resides is say, 0x3254;
during execution of this instruction [PC] = 3254h + 3h = 3257h
b. [SP]=[SP]+1; (if SP contains default value 07, then SP increments and [SP]=08
c. [[SP]] = [PC7-0]; (lower byte of PC content ie., 57 will be stored in memory location 08.
d. [SP]=[SP]+1; (SP increments again and [SP]=09)
e. [[SP]] = [PC15-8]; (higher byte of PC content ie., 32 will be stored in memory location 09.

With these the address (0x3254) which was in PC is stored in stack.

f. [PC]= address (16 bit); the new address of subroutine is loaded to PC. No flags are affected.

2. ACALL address(11 bit)

This is absolute call instruction which unconditionally calls the subroutine located at the indicated 11 bit
address. This is a 2 byte instruction. The SCALL instruction works as follows.
a. During execution of SCALL, [PC] = [PC]+2; (if address where LCALL resides is say, 0x8549;
during execution of this instruction [PC] = 8549h + 2h = 854Bh
b. [SP]=[SP]+1; (if SP contains default value 07, then SP increments and [SP]=08
c. [[SP]] = [PC7-0]; (lower byte of PC content ie., 4B will be stored in memory location 08.
d. [SP]=[SP]+1; (SP increments again and [SP]=09)
e. [[SP]] = [PC15-8]; (higher byte of PC content ie., 85 will be stored in memory location 09.

With these the address (0x854B) which was in PC is stored in stack.

6
 f. [PC10-0]= address (11 bit); the new address of subroutine is loaded to PC. No flags are
affected.

RET instruction
RET instruction pops top two contents from the stack and load it to PC.
g. [PC15-8] = [[SP]] ;content of current top of the stack will be moved to higher byte of PC.
h. [SP]=[SP]-1; (SP decrements)
i. [PC7-0] = [[SP]] ;content of bottom of the stack will be moved to lower byte of PC.
j. [SP]=[SP]-1; (SP decrements again)

Bit manipulation instructions.

8051 has 128 bit addressable memory. Bit addressable SFRs and bit addressable PORT pins. It is possible to perform
following bit wise operations for these bit addressable locations.

1. LOGICAL AND
a. ANL C,BIT(BIT ADDRESS) ; ‘LOGICALLY AND’ CARRY AND CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
b. ANL C, /BIT; ; ‘LOGICALLY AND’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY

2. LOGICAL OR
a. ORL C,BIT(BIT ADDRESS) ; ‘LOGICALLY OR’ CARRY AND CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
b. ORL C, /BIT; ; ‘LOGICALLY OR’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
3. CLR bit
a. CLR bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE CLEARED.
b. CLR C ; CONTENT OF CARRY WILL BE CLEARED.
4. CPL bit
a. CPL bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE COMPLEMENTED.
b. CPL C ; CONTENT OF CARRY WILL BE COMPLEMENTED.

ASSEMBLER DIRECTIVES.
Assembler directives tell the assembler to do something other than creating the machine code for an
instruction. In assembly language programming, the assembler directives instruct the assembler to
1. Process subsequent assembly language instructions
2. Define program constants
3. Reserve space for variables

The following are the widely used 8051 assembler directives.

ORG (origin)
The ORG directive is used to indicate the starting address. It can be used only when the
program counter needs to be changed. The number that comes after ORG can be either in hex
or in decimal.
Eg: ORG 0000H ;Set PC to 0000.

EQU and SET

EQU and SET directives assign numerical value or register name to the specified symbol name.
EQU is used to define a constant without storing information in the memory. The symbol defined
with EQU should not be redefined.
SET directive allows redefinition of symbols at a later stage.

7
DB (DEFINE BYTE)
The DB directive is used to define an 8 bit data. DB directive initializes memory with 8 bit
values. The numbers can be in decimal, binary, hex or in ASCII formats. For decimal, the 'D' after
the decimal number is optional, but for binary and hexadecimal, 'B' and ‘H’ are required. For
ASCII, the number is written in quotation marks (‘LIKE This).
DATA1: DB 40H ; hex
DATA2: DB 01011100B ;binary
DATA3: DB 48 ; decimal
DATA4: DB ' HELLO W’ ; ASCII

END
The END directive signals the end of the assembly module. It indicates the end of the program to
the assembler. Any text in the assembly file that appears after the END directive is ignored. If the
END statement is missing, the assembler will generate an error message.

8
Mov a, #12h
Mov a, r7
Mov a, 20h

Mov a, @r0, mov a, @r1,,,,,…. @ Only r0, r1 only

Mov r3, #30h
Mov r3, a
Mov r7, 25h
Mov 30h, r3
Mov 30h, r4
Mov 20h, 30h
Mov 20h, @r0, mov 35h, @r1
Mov 20h, #25h, mov 30h, #40h
Mov @r1, a, mov @r0, a

Mov @r0, 20h

Mov @r1, #0ffh
Mov dptr, #1234h
Example:

A = 23h, r0 = 45 h

XCH A, r0
A = 45h, r0 23h

XCHD A, r0
A=25h, r0 43h
XCH A, R0 === exchange instruction
Source value (right side) <=> destination (left side)
Example:
A = 23h, r0 = FA h
XCH A, r0
A = FAh, r0 23h
XCH A, r0

XCH A, @r0
A= 23H, r0 = #10h (immediate value) => becomes mem location = 34h
 A = 34h, 10h =23h

XCH A, 20H
A = 12h, 20h = 35h
 A = 35h, 20h = 12h
Exchange instruction :
Here only lower nibble (4bit) will be exchanged.
XCHD A, @r0 r0=#20h  memory location = 13h
A = 25h , r0 (20h)= 13h

A=23, 20h 15h

A= AFh, r0= 12h

 A = A2h,, r0 = 1Fh
Arithmetic Instructions
 ADD and ADDC operation effectiveness:
8051 process only 8 bit at a time, so it will use ADD instruction since CY initially
zero,, if carry generated then the cy will entering to next 8 bit in order to make
complete 16bit addition where it will make use ADDC since CY is considered
here. Note that for only 8 bit addition add instruction is enough to show Sum
and cy

1. Add 1234 h and FB19 h

here carry is ‘1’ 1 0here carry is usually ‘0’
12 34h
FB F9h
----------------
10E 2Dh
3 + F = 12 h here sum is 2 and carry is 1
Add two 16bit number 1234 h and FBF9h

Mov r0, #34h here carry is ‘1’ 1 0here carry is usually ‘0’
Mov a, #0f9h 12 34h
Add a, r0 +FB F9h
----------------
Mov r7, a 1 0E 2Dh
answer stored in registers r5 r6 r7
Mov r1, #12h
Mov a, #0fbh
Addc a, r1
Both input and output are playing in
Mov r6, a
registers
JC vijay
Mov r5, #00h
Vijay: inc r5
end
Add two 16bit number 1234 h and FBF9h

Mov r0, #34h here carry is ‘1’ 1 0here carry is usually ‘0’
Mov a, #0f9h 12 34h
Add a, r0 +FB F9h
----------------
Mov 22h, a 1 0E 2Dh
answer stored in registers 20h 21 22h
Mov r1, #12h
Mov a, #0fbh
Addc a, r1
Input in register and output are playing
Mov 21h, a
in memory location
JC vijay
Mov 20h, #00h
Vijay: inc 20h
end
Add two 16bit number 1234 h and FBF9h

Mov r0, #21h here carry is ‘1’ 1 0here carry is usually ‘0’

Mov r1, #31h 20h 21h

Mov a, @r0 12 34h
Add a, @r1

Mov 22h, a 30h 31h

+FB F9h
Mov r0, #20h ----------------
Mov r1, #30h 1 0E 2Dh
Mov a, @r0 answer stored in registers 20h 21h 22h
Addc a,@r1

Mov 21h, a
Both input and output are playing in
JC vijay
Mov 20h, #00h memory location
Vijay: inc 20h
end
Add two 16bit number 1234 h and FBF9h

Mov r0, #21h here carry is ‘1’ 1 0here carry is usually ‘0’

Mov r1, #31h 20h 21h

Mov a, @r0 12 34h
Add a, @r1

Mov r7h, a 30h 31h

+FB F9h
Mov r0, #20h ----------------
Mov r1, #30h 1 0E 2Dh
Mov a, @r0 answer stored in registers r5h r6h r7h
Addc a,@r1

Mov r6h, a
input are in memory location and
JC vijay
Mov r5h, #00h output are playing in register
Vijay: inc r5h
end
1) 5678h
-1234h
----------------
4444h 5678 h – 1234h – CY = 5678 h – 1234 h - 0  4444h hint: HERE CY =0

2) 1234 h 34h => 0011 0100

- 5678 h 78h => 0111 1000 => 1000 0111
+1
----------------- 2’ COMPLEMENT OPERATION USED WHEN CY = 1
=>1000 1000 => 88 h

therefore sub => 34h + 88h - Initial carry  BCh – 0 = BC h with CY =1

12h => 0001 0010

56h => 0101 0110 => 1010 1001
+1 2’ COMPLEMENT OPERATION USED WHEN CY = 1
----------------
=> 1010 1010 => AA h

therefor sub => 12h + AA – 1  BC h – 1  BB h

Final answer is BB BC h WITH CARRY FLAG = 1

 56 78 h
- 23 AB h
-------------
78h – AB h
1010 1011 => 0101 0100
+1
--------------
0101 0101 = 55h
78h + 55h – 0 => CD h with CY = 1

56h – 23h – 01h => 32 h

Final answer  32 CD h
Program for 2byte 16-bit Subtraction

Org 00h Next2: cpl b

Clr c Add b, #01h
Mov a, 21h Mov a, b
Add a, r1
Note: In this program
Mov r0, a
Mov b, 31h
Dec a
Mov 61h, a
Input values from 20h, 21h
Subb a, b // a = a – b - cy
Mov 62h, a
Mov 60h, #01h
end 30h, 31h, and output values
Mov a, 20h, Are stored in 60h, 61h, 62h
Mov r1, a
Mov b, 30h
Subb a, b //// a = a – b - cy

Jc next2
Mov 61h, a
Mov 60h, #00h
47 h + 25 h = 6C h
After hexadecimal
addition >9  +6
add
 MUL A B 8 Bit X 8 Bit
12h X 23h
A = 12h, B = 23h
O r A = 23h , B =12h
A f t e r multiplication operation
 R e s u l t = 02 76 h
 R e s u l t i s stored such that
 A = 76h
 B = 02h
div
1234 h X ABCD h = 0C 37 4F A4 h 16 B i t X 16 B i t
12 34 h X AB CD h
-------------------------
Carry01 29 A4  CD h X 34 h
0E 6A  CD h X 12 h
22 BC  AB h X 34 h
0C 06  AB h X 12 h
-------------------------------
0C 37 4F A4

34h x CD h = 29 A4 h  A = A4 h, B = 29h therefore here 29 h move as carry

and A4 h is one of the direct answer
Org 00h Addc a, r6 //// cy = 0 + 93 h + BC = 01 4F h
MOV r5, #0CDh Mov 22h, a
mov b, r5
Mov a, #34h Mov a, b ///// a = 22 h
Mul AB /// CD h X 34 h ? B = 29 h, A = A4 h Addc a, r7 /// 0E h + 22h + 01h = 31h, and here cy = 1 is added
Mov r3, a /// r3 = 31h, cy = 0
Mov 23h,A
Mov r6,B //// r6 = 29h Mov r5, #12h
Mov a, #0ABh
Mov a,#12h Mov B, r5
Mov b,r5 Mul AB /// B = 0C h, A = 06h
Mul AB //// 12 h X CD ? B = 0E h, A=6A h
Addc a, r3 ///06 h + 31 h + (cy = 0) = 37 h
clr c Mov 21h, a
Addc a,r6 //// a = 29 h + 6A h = 93 h with carry = 0 Mov a, b
Mov r6, a //// r6 = 93 h Mov 20h, a

Mov r7, B ///// r7 = 0E h end

Mov r5, #0ABh

mov b, r5
Mov a, #34h
Mul AB ///// AB h X 34 h ? B = 22 h, A = BC
Logical Instructions
ANL A, #34h
ANL A, r3
ANL A, 20H
ANL A, @R1
ANL 30H, A
ANL 20H, #35H

ORL A, #34h
ORL A, r3
ORL A, 20H
ORL A, @R1
ORL 30H, A
ORL 20H, #35H

XRL A, #34h
XRL A, r3
XRL A, 20H
XRL A, @R0
XRL 30H, A
XRL 20H, #35H

CLR A

CPL A

RL A
RLC A
RLC A
RR A
RRC A
And operation: 1111 0010 F2h OR operation: 1111 0010 F2h
0010 1111 2Fh 0010 1111 2Fh
---------------- ----------------
0010 0010 22h 1111 1111 FFh

XOR operation: 1111 0010 F2h CLR Clear operation: A = 1111 0010 F2h
0010 1111 2Fh A = 0000 0000 00H
----------------
1101 1101 CC h

CPL Complement operation: A = 1111 0010 F2h

A = 0000 1101 0C h
Rotate instruction

Rotate right === RR carry not considered

Rotate left === RL carry not considered

Rotate right with carry === RRC

Rotate left with carry == RLC
Boolean or bit instruction
Assignment: Find the number
of 1’s and 0’s and store the
results in r4 and r5
Branch instruction
ACALL – 11BIT ADDRESS == 2k Bytes
LCALL – 16 BIT ADDRESS == unlimited

Syntax:
ACALL delay
LCALL delay
Delay : It’s just a name of subroutine or loop
name or subprogram name
LCALL =16 BIT address == 0 to 15, ACALL = 11BIT address = 0 to 10,
PC to SP using CALL
And SP to PC using RET

11200h : mov a, r0
21201h: mov b, #12h
31202h:acall delay SP = 8bit 12 01 h
31203h: add a, b SP + 1 => 01 h
4end SP + 1 => 12 h

Subprogram: ACALL = 11BIT address = 0 to 10

1delay: mov a, b LCALL =16 BIT address == 0 to 15
Mov 20h, a
ret == entering to 2 step to tell next address is
1203 fetch
 SP PC 12 01 h

12 12
01 01

PC =12 01 h
 SP = 07H 08H 09H PC = 12H 01H
01H 12H

SP + 1 09H 12H 09H 12H

SP + 1 08H 01H 08H 01H SP - 1
07H 07H SP - 1

CALL RET
 Ex: Add a, r0 // A = 00H
JZ next1
JNZ vijay

JZ next and JNZ next

JC next and JNC next

JB next and JNB next1

CJNE A, #20H, Rel CJNE A, #20H, Rel
Mov b, a
CJNE A, 30H, Vijay
Rel: mov r0, a
Ex: A = 20H CJNE r2, #05h, raki
A  20H /// EQUAL CJNE @r1, #0Fh, 4th_ece
Next instruction executed

Ex: A = 15h, A<=>20h ////

UNEQUAL
It go to Rel loop to execute
Here: sjmp Here

Here: ljmp Here

 Here: ajmp Here

The JMP instruction transfers execution to the address generated by adding the 8-bit value in the
accumulator to the 16-bit value in the DPTR register.

A= 08 h, DPTR = 1100 h
JMP @A +DPTR 
Jump to address == PC = a + dptr = 1108h
 STACK IN 8051
• SP =>Stack pointer => 8bit => used to store address or
mem or information.
• It will take Location of last step.
• SP => Starting address = 07h => 08h to 1Fh
• Push => store mem or address or information and
Location to SP are
• Pop=> Retrieve mem. Location from SP
• Push and Pop are playing with only Register bank
• => RB0, RB1, RB2, RB3
Default=> RB0 register bank is used.
Mov r2, #0f1h
Mov r4, #1ah Top of SP SP+1 =0BH 22H Pop 7  r7
Mov r5, #15h Pop 5  r5
SP +1 = 15H

Mov r7, #22h 0AH Pop 4  r4

Push 2  r2
SP+1 =
09H
1AH Pop 2 r2
Push 4  r4 SP +1 0F1H
=08H
Push 5  r5
SP = 07H =====
Push 7 r7
If I am using different register bank then suppose RB2
RS1 = PSW.4 =1, RS0 = PSW.3 = 0 , SETB, CLR instruction is to be used.
SETB PSW.4
CLR PSW.3
Top of SP SP+1 =0BH 22H Pop 7  r7
Mov r2, #0f1h Pop 5  r5
SP +1 = 15H
Mov r4, #1ah 0AH Pop 4  r4
Mov r5, #15h SP+1 = 1AH Pop 2 r2
Mov r7, #22h 09H

Push 2  r2 SP +1 0F1H
=08H
Push 4  r4
Push 5  r5 SP = 07H =====

Push 7 r7
If I am using different register bank then suppose RB3
RS1 = PSW.4 =1, RS0 = PSW.3 = 1 , SETB, CLR instruction is to be used.
SETB PSW.4
SETB PSW.3
Top of SP SP+1 =0BH 22H Pop 7  r7
Mov r2, #0f1h Pop 5  r5
SP +1 = 15H
Mov r4, #1ah 0AH Pop 4  r4
Mov r5, #15h SP+1 = 1AH Pop 2 r2
Mov r7, #22h 09H

Push 2  r2 SP +1 0F1H
=08H
Push 4  r4
Push 5  r5 SP = 07H =====

Push 7 r7
1. Write a assemble language program to transfer a block of bytes of data from one location to
another location both internally
Data memory Contents Data memory Contents
Org 00h address address
Mov r3, #04h D:0x040 01h D:0x050 00h
Mov r0, #40h
Mov r1, #50h D:0x041 02h D:0x051 00h

D:0x042 03h D:0x052 00h

Next: Mov a, @r0
Mov @r1, a D:0x043 04h D:0x053 00h
Inc r0
Inc r1
Data memory Contents
address
Djnz r3, next D:0x050 01h
Here:sjmp here D:0x051 02h
end
D:0x052 03h
D:0x053 04h
1. Write a assemble language program to transfer a bytes of data from one location to another location
both externally

Data memory Contents Data memory Contents

Org 00h address
address
Mov r3, #04h x:0x1200 01h x:0x1500 00h
Mov r0, #00h ///dpl = source
x:0x1201 02h x:0x1501 00h
Mov r1, #00h ///dpl = destination
Back: Mov dph, #12h x:0x1202 03h x:0x1502 00h
Mov dpl, r0 /// dpl = source == 00h
x:0x1203 04h x:0x1503 00h
Movx a, @dptr /// 1200h
Inc r0 Data memory Contents
Mov dph, #15h address
Mov dpl, #r1 ////// mov dptr = 1501h x:0x1500 01h
Movx @dptr, a //// 1500h x:0x1501 02h
Inc r1
Djnz r3, back x:0x1502 03h
Here:sjmp here x:0x1503 04h
end
3. Write a assemble language program to
Data memory Contents Data memory Contents
exchange a block of bytes of data between
address address
two memory locations
D:0x040 01h D:0x050 10h
org 00h
Mov r3, #04h D:0x051 20h
D:0x041 02h
Mov r0, #40h
Mov r1, #50h D:0x042 03h D:0x052 30h

Next: Mov a, @r0 D:0x043 04h D:0x053 40h

Xch a, @r1
Mov @r0, a Data memory Contents Data memory Contents
address address
Inc r0 D:0x040 10h D:0x050 01h
Inc r1
D:0x041 20h D:0x051 02h
Djnz r3, next D:0x052 03h
D:0x042 30h
Here:sjmp here D:0x043 40h D:0x053 04h
end
+ ve and – ve number program
45h, a3h,11h, 07h, f1h Concept: +ve or –ve no.
Org 00h
Mov dptr, #2000h Indicated by 8th bit of any
Mov r3, #05h
Back: Movx a, @dptr /// 45h hexadecimal number
rlc a
Jnc Positive Ex: 45h = 0100 0101
inc 30h
Inc dpl
djnz r3, back
8 bit = 0 = + ve 30h
th

here:sjmp here A5h = 1010 0101

Positive: inc 20h
Inc dpl 8 bit = 1 = - ve 20h
th
djnz r3, back
here:sjmp here
end
Find the largest and smallest number in an array of numbers which are stored in memory
locations.
F1h, 12h, 33h, F8h,
 F8h = largest
 12h = smallest SMALLEST LARGEST
 Write an ALP for Decimal DOWN-Counter.
Write an ALP for Decimal UP-Counter

ORG 00H
ORG 00H
MOV R3, #64H
MOV R3, #64H

BACK1: MOV A, #99H

BACK1: MOV A, #00H
MOV P1, #00H
MOV P1, #00H

BACK2: MOV P1, A

BACK2: MOV P1, A
ACALL VIJAY
ACALL VIJAY
ADD A, #99H
ADD A, #01H
DA A
DA A
DJNZ R3, BACK2
DJNZ R3, BACK2
SJMP BACK1
SJMP BACK1

VIJAY:MOV R0, #255

VIJAY:MOV R0, #255
HERE1:MOV R1, #255
HERE1:MOV R1, #255
HERE2:MOV R2, #255
HERE2:MOV R2, #255
HERE3:DJNZ R2, HERE3
HERE3:DJNZ R2, HERE3
DJNZ R1, HERE2
DJNZ R1, HERE2
DJNZ R0, HERE1
DJNZ R0, HERE1
RET
RET
END
END

EXPECTED RESULTS:
EXPECTED RESULTS:
NOTE THAT 64H = 99 in decimal
NOTE THAT 64H = 99 in decimal
PORT1: P1: 99 TO 00 displayed
PORT1: P1: 00 TO 99 displayed
Org 00h
Mov r3, #0ah
Mov r1, #20h
Mov a, #00h
Mov @r1, a /// 0
add a,#01h
inc r1
Mov @r1, a ///1
Back: dec r1 //// to 20h
add a, @r1 //// 0 + 1 ,, 20h + 21h = 01
da a
inc r1
inc r1
Mov @r1, a
djnz r3, back
end
1. Eight bit numbers X, NUM1 and NUM2 are stored in internal data RAM locations 20h, 21h and 22H respectively. Write an
assembly language program to compute the following: org 00h
IF X=0; then NUM1 (AND) NUM2, Mov r0, 21h
IF X=1; then NUM1 (OR) NUM2, Mov r1, 22h
IF X=2; then NUM1 (XOR) NUM2, mov a, 20h
ELSE RES =00, RES is 23H RAM location. cjne a,#00h,vijay1
Mov a, 21h
Concept of Problem: Anl a, 22h
20H  X, 21HNUM1, 22HNUM2, 23HRES Here: sjmp Here
20h = 00h, 21h and 22 h,, Results stored in Accumulator  A mov a,20h
20h = 01h, 21h or 22h,, Results stored in Accumulator  A vijay1: cjne a,#01h,vijay2
20h = 02h, 21h XOR 22h, Results stored in Accumulator  Mov a, 21h
20h = other than 00h, 01h, 02h, 23 h = 00h. Orl a, 22h
Here1:sjmp Here1
mov a,20h
vijay2:cjne a,#02h,vijay3
Mov a, 21h
Xrl a, 22h
Here2:sjmp Here2
Vijay3: mov 23h, #0ffh
Here3:sjmp here3
end
Write an assembly language program to find the average of 10 students Data memory Contents
marks stored in external RAM memory address 8000H. Load the average address
value in internal RAM memory 30H.
x:0x8000 01h
org 00h
x:0x8001 02h
mov dptr, #8000h
mov r1, #0ah x:0x8002 03h
mov r2, #00h x:0x8003 04h
loop: movx a,@dptr
x:0x8004 05h
add a, r2
mov r2,a /// Finally r2 contains total marks x:0x8005 06h
inc dpl
x:0x8006 07h
djnz r1, loop
mov b, #0ah /// b = 0ah x:0x8007 08h
mov a,r2 //// a = r2 x:0x8008 09h
div ab
mov 30h,a //// quotient value x:0x8009 0Ah
mov 31,b //// remainder value
end
Write an assembly language program to find the factorial of a number. Use
Subroutine programming. org 00h
Input is 04h  mov r0,#04h
Output is  04h X 03h X 02h X 01h mov a,r0
acall fact
fact:dec r0
We can show the results in terms of decimal cjne r0,#01,vijay
Value by using da a instruction sjmp stop
Note this program is only for smaller values vijay:mov b,r0
mul ab
da a
acall fact
stop:sjmp stop
end
Write an assembly language program to count
the number of 1’s and 0’s in an 8-bit data Org 00h Org 00h
received from port P1. Store the count of 1’s and Clr c Clr c
0’s in 30h and 31h. Mov a, 90h /// 90h = Port 1 Mov a, 90h /// 90h = Port 1
Mov r3, #08h Mov r3, #08h
P1 => 45h ==> 0100 0101 Back: rlc a
jc loop
Back: rlc a
jnc loop
No. of one’s (1’s) = 03h => stored in 30h Inc 31h Inc 30h
No. of zero’s (0’s) = 05h => stored in 31h Djnz r3, back Djnz r3, back
Cy flag <= 0100 0101 Here:sjmp here Here:sjmp here
With initial carry = 0 using clr c loop:inc 30h loop:inc 31h
RLC => cy data bits Djnz r3, back Djnz r3, back
1 1000 1010 JC LOOP inc 31h Here:sjmp Here Here:sjmp Here
RLC => 2 0001 0100 JC LOOP end end
LOOP:inc 30h

8 TIMES RLC NEEDED == R3 COUNTER 8

TIMES
 Ascending and Descending Order
Org 00h
Concept: 05h, F1h, 23h, FFh, 01h
Mov r5, #05h
Ascending: 01h, 05h,23h, F1h, FFh
Backexternal: mov r4, #05h
R0=>R1=>R2
Mov r0, #20h
05h, 23h, F1h, 01h,FFh = 1st step
Mov r1, #21h
Backinternal: mov a, @r0 05h, 23h, 01h, F1h, FFh = 2nd step
Mov 50h, a
Mov b, @r1 05h, 01h, 23h, F1h, FFh = 3rd step
Subb a, b
Jnc VIJAY /// note that Jnc for Ascending and Jc for 01h, 05h, 23h, F1h, FFh = 4th step
Descending
Sjmp last
mov a, 50h
Xch a, @r1
Xch a, @r0
VIJAY: inc r0
Inc r1
djnz r4, backinternal
djnz r5, backexternal
end
 Square and Cube of Number
Square of a given number Input value :1Ah X 1Ah X 1Ah
1500h == 1A h == input
50h, 51h == output 1Ah X 1Ah
--------------------- 1Ah X 1Ah
02 A4 h ---------------------
org 00h 50h 51h 02 A4 h
mov dptr, #1500h
02 A4 h X 1Ah
movx a, @dptr
---------------------
mov b, a or mov b ,#1Ah 10 A8 h
mul ab //// a = A4h, b=02h 00 34
mov 50h, b ------------------------
mov 51h, a 00 44 A8 h
end
Cube of a given number Input value :1Ah X 1Ah X 1Ah
1500h == 1A h == Input Mov a, #1Ah
50h, 51h == Output Mov b, #r5
org 00h
1Ah X 1Ah
Mul ab // a = 34h, b = 00h ---------------------
Mov dptr, #1500h
Movx a, @dptr Mov 32h, r1 02 A4 h
Mov a, b Add a, r2 /// a = 44h
mul ab /// a = A4h, b = 02h Mov 31h, a 02 A4 h X 1Ah
mov r4, a //// r4 = A4h
mov r5, b //// r5 = 02h
---------------------
Mov a, #00h 10 A8 h /// A4 h X 1Ah
mov a, #1ah
mov b, r4 Mov r1, b 00 34 /// 02 h X 1Ah
mul ab ////// a= A8h, b = 10h Addc a, r1 ------------------------
mov r1, a /// r1 = A8h 00 44 A8 h  30h, 31h, 32h
Mov r2, b /// r2 = 10h Addc a, b
Mov 31h, a
Mov 30h, b
end
Find Odd or Even of a given number , put the output FFh in Port2 for odd and 00h in port 2
for even
Example: 23h => 0010 0011 = odd
0 = 0000h => even org 00h 4Ah => 0100 1010 = even
1 = 0001h => odd Mov P2, #00h
2 = 0010h => even clr c
3 = 0011h => odd
4 = 0100h => even Mov dptr, #1500h
5 = 0101h => odd Movx a, @dptr /// a = 23h = input
6 = 0110h => even rrc a ///if cy = 1 jump to next loop otherwise next instruction is executed
7 = 0111h => odd jc next
8 = 1000h => even
mov P2, #00h
9 = 1001h => odd
A = 1010h => even here1:sjmp here1
B = 1011h => odd next: mov P2, #0FFh
C = 1100h => even here: sjmp here
D = 1101h => odd end
E = 1110h => even
F = 1111h => odd

We need to observe first binary bit of any given number to indicate odd or even, 0 = even, 1= odd
Input: Unpacked BCD number = 05h Input: ASCII number = 35
Output: ASCII number = 35 Output: Unpacked BCD number = 05h
 Packed BCD to ASCII number program
Input: Packed BCD number = 12h= 0001 0010
Output: ACSCII: 31 32 = 0011 0001 0011 0020
org 00h
mov a, #12h
anl a, #0f0h /// a = 10h Store the final answer in r1,r2 register
swap a /// a = 01h
add a, #30h /// a = 31h
mov r1, a /// r1 = 31h
mov a, #12h
anl a, #0fh ///a = 02h
add a, #30h /// a = 32h
Mov r2, a
end
 ASCII number to packed BCD number program
Input: ACSCII: 31 32 = 0011 0001 0011 0020
Output: Packed BCD number = 12h= 0001 0010

org 00h Take the input from 2000h = 31h and 2001h =32h
mov dptr, #2000h Store the final answer in 20h location
movx a, @dptr /// a = 31h
subb a, #30h //// a = 01h
mov r1, a ///// r1 = 01h
Inc dpl //// 2000h becomes  2001h
Movx a,@dptr ///a =32h
subb a, #30 /// a = 02h
mov r2, a /// r2 ==02h since r1 =01h, r2 = 02h, but answer 12h => 20h
mov a, r1 //// a = 01h
swap a //// a = 10h
orl a, r2 //// a = 10h or 02h  0001 0000 0r 0000 0010 = > 0001 0010 12h
mov 20h, a
end
Decimal to Hexadecimal Number
org 00h 16)171(10
mov a,#17 160
mov b,#16 ------
div ab 11
mov r1, b First division A = 10 = 0Ah, B = 11 = 0Bh
add a, #09h Answer => AB h
mov r5, a
mov r2,#01 16)165(10
mov a, r1 160
swap a ------
orl a, r2 05
mov r3, a First division A = 10 = 0Ah, B = 05h
anl a, #0f0h Answer => A5 h
swap a
mov b, #0ah 16)212(13
mul ab 208
mov r1, a ------
mov a,r3 04
anl a, #0fh First division A = 13 = 0Dh, B = 04 = 04h
add a, r1 Answer => D4 h
mov r6, a
mov a, r5
end