Logic Gates
&
Boolean Algebra
Instructor: Afroza Sultana
Boolean Constants and Variables
• Boolean constants and variables are allowed to
have only two possible values, 0 or 1.
• Boolean 0 and 1 do not represent actual numbers
but instead represent the state of a voltage
variable, or what is called its logic level.
• 0/1 and Low/High are used most of the time.
Logic Operations
• Three Logic operations:
- Logical Addition (OR operation)
- Logical Multiplication (AND operation)
- Logical Inversion (NOT operation)
• Logic Gates
– Digital circuits constructed from diodes,
transistors, and resistors whose output is the
result of a basic logic operation (OR, AND, NOT)
performed on the inputs.
Truth Tables
• How a logic circuit’s output depends on the logic
levels present at the inputs.
OR Operation with OR gates
Output is HIGH if any input is HIGH
Symbol truth table & waveform for a
three-input OR gate
And Operation with And Gates
Output is HIGH if all inputs are HIGH
(c)
(a) Truth Table (b) Gate Symbol (c) waveform
Truth Table and Symbol for a three-input
AND gate
NOT operation
• Truth Table, Symbol, Sample Waveform
Output is inverse of the input
Describing logic circuits algebraically
• Any logic circuit, no matter how complex, can be
completely described using the three basic
Boolean operations: OR, AND, NOT.
• Example: logic circuit with its Boolean
expression X=A.B+C
Parentheses
• How to interpret AB+C?
– Is it AB ORed with C ? Is it A ANDed with B+C ?
• Order of precedence for Boolean algebra: AND before
OR. Parentheses make the expression clearer, but
they are not needed for the case on the preceding
slide.
• Note that parentheses are needed here :
Circuits Contain INVERTERs
• Whenever an INVERTER is present in a logic-
circuit diagram, its output expression is simply
equal to the input expression with a bar over it.
More Examples
Implementing Circuits From Boolean
Expressions
• When the operation of a circuit is defined by a
Boolean expression, we can draw a logic-circuit
diagram directly from that expression.
Precedence
• First, perform all inversions of single terms
• Perform all operations with parentheses
• Perform an AND operation before an OR
operation unless parentheses indicate
otherwise
• If an expression has a bar over it, perform the
operations inside the expression first and then
invert the result
Example
• Draw the circuit diagram to implement the
expression
x ( A B )( B C )
Evaluating Logic Circuit Outputs
Once we have the Boolean expression for a circuit
output, we can obtain the output logic level for any
set of input and even determine the truth table.
Example: Determine the output X for the condition
where A=0,B=1,C=1 and D=1
X= A B C (A+D)
Evaluating Logic Circuit Outputs
• X=A B C (A +D)
= 0.1.1.(0+1)
= [Link]
=[Link]
=0
• We can also evaluate the output levels by simplifying the
logic output using Boolean Algebra.
X= A B C (A +D)
= A B C (A . D)
=ABCD
= [Link]
=0
Analysis Using Truth Table
NOR Gates
• NOR Symbol, Equivalent Circuit, Truth Table & Wave
form
Output is inverse of the output of OR
Example
• Determine the Boolean expression for a three-input
NOR gate followed by an INVERTER
NAND Gate
• Symbol, Equivalent Circuit, Truth Table &
Wave form Output is inverse of the output of AND
Example
• Implement the logic circuit for the following
expression using only NOR and NAND gates
x AB C D
• Determine the output level in last example for
A=B=C=1 and D=0
Boolean Theorems (single-variable)
1) X.0 =0 5) X+0 =X
2) X.1 =X 6) X+ 1 =1
7) X+X =X
3) X. X =X
4) X. X =0 8) X+X =1
Multivariable Theorems
09. x+y = y+x
10. xy = yx Commutativ law
11. x+(y+z) = (x+y)+z
12. (xy)z = x(yz) Associative law
13. (a) x(y+z) = xy+xz
(b)(w+x)(y+z)= wy+xy+wz+xz Distributive Law
14. x+xy = x
15. (a) x + x y = x + y
(b) x + x y = x + y
Examples
• Simplify the expression y ABD AB D
Ans: y A B
• Simplify z A B A B
Ans: z B
• Simplify x ACD ABCD
Ans: x ACD BCD
Demorgan’s Theorems
x y x y
x y x y
Implications of DeMorgan’s Theorems
Example
• Determine the output expression for the following
circuit and simplify it using DeMorgan’s Theorem
• Simplify the expression z A C B D to one
having only single variables inverted.
ans.) z AC B D
Alternate Logic-Gate Representations
Standard and alternate symbols for various logic
gates and inverter.
Logic-symbol Interpretation
• Active high/low
– When an input or output line on a logic circuit symbol has
no bubble on it, that line is said to be active-high, otherwise
it is active-low.
Alternate Logic-Gate Representations
A+B=AB
A
AB A
B
B
X X
C
C
C+D D
D C D= C+D
X= AB (C+D)
Original Symbol Alternative Symbol
How to obtain the alternative symbol
from standard ones
• Invert each input and output of the standard symbol.
This is done by adding bubbles(small circles) on
input and output lines that do not have bubbles and
by removing bubbles that are already there.
• Change the operation symbol from AND to OR, or
from OR to AND. (In the special case of the
INVERTER, the operation symbol is not changed.)
Several points
• The equivalences can be extended to gates with
any number of inputs.
• None of the standard symbols have bubbles on
their inputs, and all the alternate symbols do.
• The standard and alternate symbols for each gate
represent the same physical circuit.
• NAND and NOR gates are inverting gates, and so
both the standard and the alternate symbols for
each will have a bubble on either the input or the
output.
• AND and OR gates are non-inverting gates, and so
the alternate symbols for each will have bubbles on
both inputs and output.
Universality of NAND gates
Universality of NOR gate
Example
Exclusive-OR Circuit
Exclusive-OR (XOR) produces a HIGH output whenever the
two inuts are at opposite levels.
Truth Table
Ex-OR gate
Wave form
Exclusive-NOR Circuit
Exclusive-NOR (XNOR) produces a HIGH output
whenever the two inputs are at the same level.
Truth Table
Ex-NOR gate
Parity Method
• Parity Bit: An extra bit (single 0 or 1) that is
attached to a code group that is being transferred
from one location to another.
• Two parity methods are
(a) Even Parity Method
(b) Odd Parity Method
Even Parity Method
• The value of the parity bit is chosen so that the
total no of 1s in the code group is an even
number.
• Example:
i) 101101110010100 – signal without p.b.
0101101110010100 – signal with p.b.
ii) 1011101001100 - signal without p.b.
11011101001100 - signal with p.b.
Odd Parity Method
• The value of the parity bit is chosen so that the
total no of 1s in the code group is an odd
number.
• Example:
i) 101101110010100 – signal without p.b.
1101101110010100 – signal with p.b.
ii) 1011101001100 - signal without p.b.
01011101001100 - signal with p.b.
Even Parity Generator and Checker
Even Parity Generator and Checker
• The set of data to be transmitted is applied to the
parity generator to produce the parity bit P.
• The p.b. is transmitted to the receiver along with
the data.
• At the receiver the data with p.b. enters the parity
checker, which produces an error output E to
indicate the error.
