Chapter 3

Microprocessor
Cont…
• Microprocessor is an electronic circuit that functions as
the central processing unit (CPU) of a computer,
providing computational control.
• It controls memory and I/O through a series of
connections called buses.
• The buses select an I/O or memory device, transfer data
between the I/O device or memory and the MP control
the I/O and memory system.
• Memory and I/O are controlled through instructions that
are stored in the memory and executed by the MP.
Cont…
• A Microprocessor is a device, which is capable of :
• Receiving Input
• Performing Computations
• Storing data and instructions
• Display the results
• Controlling all the devices that perform the above 4
functions.
• It can be also defined as a programmable device that
takes in numbers, performs on them arithmetic or
logical operations according to the program stored in
memory and then produces other numbers as a result.
Cont…
• Internally, the microprocessor is made up of 3 main units.
• The Arithmetic/Logic Unit (ALU)
• The Control Unit.
• An array of registers- for holding data while it is being
manipulated.
 Cont..

ALU
• The arithmetic logic unit (ALU) performs arithmetic operations such as
addition and subtraction and logical operations such as AND, OR, and
NOT.
Control unit
• The control unit (CU) coordinates the sequencing of steps involved in
executing machine instructions.
 Cont..

• A bus: is a group of parallel wires that transfer data from one part of the
computer to another.

• A computer system usually contains four bus types: data, I/O, control,
and address.
• The data bus transfers instructions and data between the CPU and memory.

• The I/O bus transfers data between the CPU and the system input/output devices.

• The control bus uses binary signals to synchronize actions of all devices attached to
the system bus.
• The address bus holds the addresses of instructions and data when the currently
executing instruction transfers data between the CPU and memory.
• Block Diagram of a Microcomputer
Instruction Execution Cycle
• The execution of a single machine instruction can be divided into
a sequence of individual operations called the instruction
execution cycle.
• Before executing, a program is loaded into memory.
• The instruction pointer(IP) contains the address of the next
instruction.
• The instruction queue holds a group of instructions about to be
executed.
• Executing a machine instruction requires four basic steps: fetch,
decode and execute.
• Two more steps are required when the instruction uses a memory
operand: fetch operand and store output operand.

•
Cont..
• Fetch: The control unit fetches the next instruction from the instruction
queue and increments the instruction pointer (IP).
• The IP is also known as the program counter.
• Decode: The control unit decodes the instruction’s function to determine
what the instruction will do.
• The instruction’s input operands are passed to the ALU, and signals are
sent to the ALU indicating the operation to be performed.
• Fetch operands: If the instruction uses an input operand located in
memory, the control unit uses a read operation to retrieve the operand
and copy it into internal registers.
• Internal registers are not visible to user programs.
• Execute: The ALU executes the instruction using the named registers and
internal registers as operands and sends the output to named registers
and/or memory.
• Store output operand: If the output operand is in memory, the control unit
uses a write operation to store the data.
Cont..

• The sequence of steps can be expressed neatly in pseudocode:

loop
fetch next instruction
advance the instruction pointer (IP)
decode the instruction
if memory operand needed, read value from
memory
execute the instruction
if result is memory operand, write result to
memory
continue loop
Section Review:(Quize 0ne) 5%
1. The central processor unit (CPU) contains registers and what
other basic elements?
2. The central processor unit is connected to the rest of the
computer system using what three buses?
3. What are the three basic steps in the instruction execution cycle?
4. Which two additional steps are required in the instruction
execution cycle when a memory operand is used?
5. During which stage of the instruction execution cycle is the
program counter incremented?
Addressing Modes
• Addressing modes describe how the processor identifies the
location of the data it needs to work with during program
execution.
• In other words, they specify how an instruction accesses
operands (data values).
• Most assembly language instructions require operands to be
processed.
• An operand address provides the location, where the data to
be processed is stored.
Cont…
• Some instructions do not require an operand, whereas
some other instructions may require one, two or three
operands.
• When an instruction requires two operands, the first
operand is generally the destination, which contains data
in a register or memory location and the second operand
is the source.
• Source contains either the data to be delivered
(immediate addressing) or the address (in register or
memory) of the data.
• Generally, the source data remains unaltered after the
operation.
 Cont…
• A computer instruction is often divided into two parts
• An opcode (Operation Code) that specifies the operation for that
instruction
• An address that specifies the registers and/or locations in memory
to use for that operation
• In the Basic Computer, since the memory contains 4096 (= 212) words,
we needs 12 bit to specify which memory address this instruction will
use
• In the Basic Computer, bit 15 of the instruction specifies the
addressing mode (0: direct addressing, 1: indirect addressing)
• Since the memory words, and hence the instructions, are 16 bits long,
that leaves 3 bits for the instruction’s opcode
Cont…

• The address field of an instruction can represent either

• Direct address: the address in memory of the data to use (the
address of the operand), or
• Indirect address: the address in memory of the address in memory
of the data to use

Effective Address (EA)

• The address, that can be directly used without modification to access an
operand for a computation-type instruction.
 Cont…
Addressing Mode Description Example (Assembly)

Operand is part of the instruction itself

Immediate Addressing MOV R1, #5 (Move 5 into R1)
(value is hard-coded).

Address of the operand is given MOV R1, [5000] (Move value at address
Direct Addressing
explicitly in the instruction. 5000 into R1)

Instruction specifies a register/memory

MOV R1, [R2] (Move value pointed by
Indirect Addressing location that contains the address of
R2 into R1)
the operand.
Operand is located in a processor
Register Addressing ADD R1, R2 (Add R2 to R1)
register.
Register holds the memory address of
Register Indirect Addressing MOV R1, [R3]
the operand.
Effective address = base address + an
Indexed Addressing MOV R1, [R2 + R3] (Base + Index)
index (often used for arrays).

Effective address = contents of a base

Base-Register Addressing MOV R1, [BaseReg + Offset]
register + displacement.

Operand's address is determined by

Relative Addressing adding a constant value to the program Used in branching: BEQ label
counter (PC).

Operand is implicitly on the top of the

Stack Addressing PUSH R1 / POP R2
stack (no need to specify address).
 Chapter 4
Basic Computer Registers
 PROCESSOR REGISTER
• A processor has many registers to hold instructions, addresses, data, etc
Registers ?
• The processor has a register, the Program Counter (PC) that holds the
memory address of the next instruction
• Since the memory in the Basic Computer only has 4096
locations, the PC only needs 12 bits
• In a direct or indirect addressing, the processor needs to keep track of
what locations in memory it is addressing: The Address Register (AR)
is used for this
• The AR is a 12 bit register in the Basic Computer
• When an operand is found, using either direct or indirect addressing, it is
placed in the Data Register (DR). The processor then uses this value as
data for its operation
• The Basic Computer has a single general purpose register – the
Accumulator (AC)
 Cont…
• The significance of a general purpose register is that it can be used for
loading operands and storing results
e.g. load AC with the contents of a specific memory location; store
the contents of AC into a specified memory location
• Often a processor will need a scratch register to store intermediate
results or other temporary data; in the Basic Computer this is the
Temporary Register (TR)
• The Basic Computer uses a very simple model of input/output (I/O)
operations
• Input devices are considered to send 8 bits of character data to the
processor
• The processor can send 8 bits of character data to output devices
• The Input Register (INPR) holds an 8 bit character gotten from an input
device
• The Output Register (OUTR) holds an 8 bit character to be send to an
output device
Cont…
 Addressing Modes
• The different ways in which a source operand is denoted in an instruction is
known as addressing modes.
• The three basic modes of addressing in 8086 programming :
• Register addressing
• Immediate addressing
• Memory addressing
Register Addressing
• In this addressing mode, a register contains the operand.
• Depending upon the instruction, the register may be the first operand, the
second operand or both
• For example,
• MOV DX, TAX_RATE ; Register in first operand
• MOV COUNT, CX ; Register in second operand
• MOV EAX, EBX ; Both the operands are in registers
• As processing data between registers does not involve memory, it provides
fastest processing of data.
 Cont…
• Immediate Addressing:
• An immediate operand has a constant value or an expression.
• When an instruction with two operands uses immediate addressing, the
first operand may be a register or memory location, and the second
operand is an immediate constant. The first operand defines the length
of the data.
• For example:
• BYTE_VALUE DB 150 ;A byte value is defined
• WORD_VALUE DW 300 ;A word value is defined
• ADD BYTE_VALUE, 65 ; An immediate operand 65 is added
• MOV AX, 45H ; Immediate constant 45H is transferred to AX
 Cont…
• Memory Addressing
• When operands are specified in memory addressing mode, direct
access to main memory, usually to the data segment, is required.
• To locate the exact location of data in memory, we need the segment
start address, which is typically found in the DS register and an offset
value.
• This offset value is also called effective address.
• In direct addressing mode, the offset value is specified directly as part
of the instruction, usually indicated by the variable name.
• The assembler calculates the offset value and maintains a symbol
table, which stores the offset values of all the variables used in the
program.
• In direct memory addressing, one of the operands refers to a memory
location and the other operand references a register.
• For example,
ADD BYTE_VALUE, DL ; Adds the register in the memory location
MOV BX, WORD_VALUE ; Operand from the memory is added to register
 Registers in 8086 Microprocessor – General
Purpose, Segment & Flag Registers

• The 8086 microprocessor has a powerful set of registers.

• These different internal registers are accessed by the programmers
programming the 8086 microprocessor.
• All the registers are 16-bit and are grouped into several categories
as follows,
• General-purpose registers,
• Segment registers,
• Special purpose registers, and
• Flag register.
• There are eight general-purpose registers, six segment registers, a
processor status flags register (EFLAGS), and an instruction pointer (EIP).
General-purpose registers
• The general-purpose registers are primarily used for arithmetic and
data movement.

• As shown in Figure above, the lower 16 bits of the EAX register can be referenced by the name AX.
• Portions of some registers can be addressed as 8-bit values. Cont…
• For example, the AX register, has an 8-bit upper half named AH and an 8-bit
lower half named AL.
• The same overlapping relationship exists for the EAX, EBX, ECX, and EDX
registers:

• If AX= 0011000000111001, then AH=00110000 and AL=00111001. Therefore, when you modify
any of the 8 bit registers 16 bit register is also updated, and vice-versa. The same is for other
three registers, "H" is for high and "L" is for low part.
• The remaining general-purpose registers can only be accessed using 32-bit
or 16-bit names, as shown in the following table:
 Instruction Sets
• Data Movement Instructions
o The fundamental data movement operation is MOV dest, source,
which copies a byte or a word from the source location to the
destination.
o In general, either the source or the destination must be a register
(you can't copy directly from one memory location to another with
MOV);
o The only exception is that an immediate value may be moved
straight to memory (however, there is no way to put an immediate
value into a segment register in one operation).
 Cont…
• PUSH: Used to put a word at the top of the stack.
• POP: Used to get a word from the top of the stack to the provided
location.
• PUSHA: Used to put all the registers into the stack.
• POPA: Used to get words from the stack to all registers.
• XCHG: Used to exchange the data from two locations.
The ADD and SUB Instructions
• The ADD and SUB instructions are used for performing simple
addition/subtraction of binary data in byte, word and double-word size, i.e., for
adding or subtracting 8-bit, 16-bit or 32-bit operands, respectively.
• Syntax: ADD/SUB destination, source
 Cont…
• The ADD/SUB instruction can take place between:
• Register to register
• Memory to register
• Register to memory
• Register to constant data
• Memory to constant data
• However, like other instructions, memory-to-memory operations
are not possible using ADD/SUB instructions.
Instruction Formats
• Computers may have instructions of several different lengths containing
varying number of addresses.
• The number of address fields in the instruction format of a computer depends
on the internal organization of its registers.
• Most computers fall into one of three types of CPU organizations:
• Single accumulator organization.
• General register organization.
• Stack organization.
Single accumulator organization
• In this type of CPU organization all operations are performed with an implied accumulator
register.
• The instruction format in this type of computer uses one address field.
For example, the instruction that specifies an arithmetic addition is defined by an assembly
language instruction as ADD X.
 Where X is the address of the operand.
 The ADD instruction in this case results in the operation
• AC ← AC + M[X].
 AC is the accumulator register and M[X] symbolizes the memory word located at
address X.
General register organization.
• The instruction format in this type of computer needs three register address fields.
• Thus, the instruction for an arithmetic addition may be written in an assembly language as:
ADD R1, R2, R3
• To denote the operation R1 ← R2 + R3. The number of address fields in the instruction
can be reduced from three to two if the destination register is the same as one of the
source registers.
• Thus the instruction ADD R1, R2 Would denote the operation R1 ← R1 + R2. Only register
addresses for R1 and R2 need be specified in this instruction.
• Computers with multiple processor registers use the move instruction with a mnemonic
MOV to symbolize a transfer instruction.
Stack organization
• Computers with stack organization would have PUSH and POP instructions which
require an address field.
• Thus, the instruction PUSH X Will push the word at address X to the top of the
stack.
• The stack pointer is updated automatically.
• Operation-type instructions do not need an address field in stack- organized
computers. This is because the operation is performed on the two items that are on
top of the stack.
• The instruction ADD In a stack computer consists of an operation code only with no
address field.
• This operation has the effect of popping the two top numbers from the stack, adding
the numbers, and pushing the sum into the stack.
• There is no need to specify operands with an address field since all operands are
implied to be in the stack.
Three-address instructions
• Computers with three-address instruction formats can use each address field to specify
either a processor register or a memory operand.
• The program in assembly language that evaluates X = (A + B) ∗ (C + D) is shown below.
• ADD R1, A, B R1 ← M [A] + M [B]

• MUL X, R1, R2 M [X] ← R1 ∗ R2

• ADD R2, C, D R2 ← M [C] + M [D]

• It is assumed that the computer has two processor registers, R1 and R2. The symbol M [A]
denotes the operand at memory address symbolized by A.
• The advantage of the three-address format is that it results in short programs when
evaluating arithmetic expressions.
• The disadvantage is that the binary-coded instructions require too many bits to specify
three addresses.
Two-address instructions
• Two address instructions are the most common in commercial computers
• Here again each address field can specify either a processor register or a memory word.
• The program to evaluate X = (A + B) ∗ (C + D) is as follows:
• MOV R1, A R1 ← M [A]
• ADD R1, B R1 ← R1 + M [B]
• MOV R2, C R2 ← M [C]
• ADD R2, D R2 ← R2 + M [D]
• MUL R1, R2 R1 ← R1∗R2
• MOV X, R1 M [X] ← R1
• The MOV instruction moves or transfers the operands to and from memory and processor
registers.
• The first symbol listed in an instruction is assumed to be both a source and the destination
where the result of the operation is transferred.
One-address instructions
• One-address instructions use an implied accumulator (AC) register for all data
manipulation.
• For multiplication and division there is a need for a second register.
• However, here we will neglect the second and assume that the AC contains the result of tall
operations.
• The program to evaluate X = (A + B) ∗ (C + D) is

• All operations are done between the AC register and a memory operand
• T is the address of a temporary memory location required for storing the intermediate result.
Zero-address instructions
• A stack-organized computer does not use an address field for the instructions ADD and
MUL.
• The PUSH and POP instructions, however, need an address field to specify the operand
that communicates with the stack.
• The following program shows how X = (A + B) ∗ (C + D) will be written for a stack
organized computer. (TOS stands for top of stack)
Example